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STM32WBA62CGF6 Datasheet(PDF) 39 Page - STMicroelectronics |
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STM32WBA62CGF6 Datasheet(HTML) 39 Page - STMicroelectronics |
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39 / 185 page ![]() DS14736 Rev 1 39/185 STM32WBA6xxx Functional overview 69 SPI3 O O O O(14) O O(14) O O(14) - -- - ADC4 O O O O(15) O O(15) - -- -- - COMPx (x = 1, 2) O O O OO O- -- -- - LPTIM1 O O O O(16) O O(16) O O(16) - -- - LPTIM2 O O O O(16) O O(16) - -- -- - GPDMA1 O O O O(17) R -- -- -- - USB OTG O - O - R - O- -- -- -- - TIMx (x = 1, 2, 3, 4, 16, 17) OO R -R -- -- -- - SAI1 O O R -R -- -- -- - TSC O O R -R -- -- -- - RNG O O R -R -- -- -- - AES and SAES O O R -R -- -- -- - PKA O O R -R -- -- -- - HASH O O R -R -- -- -- - CRC O O R -R -- -- -- - HSEM O R R -R -- -- -- - GTZC_TZSC O R R -R -R -- -- - GTZC_TZIC O R R -R -R -- -- - GTZC_MPCBB1 O R R -R -R -- -- - GTZC_MPCBB2 O R R -R -R -- -- - GTZC_MPCBB6 O R R -R -R -- -- - WWDG O O R -R -R -- -- - SysTick timer O O R -R -R -- -- - DBGMCU O O O(18) - O (18) - O (18) - O (19) - O (19) - 1. Legend: Y = yes (enabled). O = optional (disabled by default, can be enabled by software).R = retained, - = not available. Gray cells highlight the wake-up capability in each mode. 2. The flash memory can be configured in power-down mode. By default, it is not in power-down mode. 3. The SRAMs can be powered on or off independently. 4. Parity error interrupt or NMI wake-up from Stop mode. 5. PWR voltage scaling is reset to range 2. 6. RCC sysclk source is reset to HSI16. Table 10. Functionalities depending on the working mode(1) (continued) Peripheral Run Sleep Stop 0 Stop 1 Stop 2 Standby retention Standby - - - - |
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