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STM32WBA62CGF6 Datasheet(PDF) 20 Page - STMicroelectronics |
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STM32WBA62CGF6 Datasheet(HTML) 20 Page - STMicroelectronics |
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20 / 185 page ![]() Functional overview STM32WBA6xxx 20/185 DS14736 Rev 1 Table 3. Access status versus protection level and execution modes when TZEN = 0 Area RDP level User execution (boot from flash memory) Debug/boot from RAM/ bootloader(1) Read Write Erase Read Write Erase Flash main memory 1 Yes Yes Yes No No No(4) 2 Yes Yes Yes N/A N/A N/A System memory(2) 1 Yes No No Yes No No 2 Yes No No N/A N/A N/A Option bytes(3) 1Yes Yes(4) N/A Yes Yes(4) N/A 2Yes No(5) N/A N/A N/A N/A OTP 1Yes Yes(6) N/A Yes Yes(6) N/A 2Yes Yes(6) N/A N/A N/A N/A Backup registers 1 Yes Yes N/A No No N/A(7) 2 Yes Yes N/A N/A N/A N/A SRAM2 1 Yes Yes N/A No No N/A(8) 2 Yes Yes N/A N/A N/A N/A 1. When the protection level 2 is active, the debug port, the boot from RAM, and the boot from system memory are disabled. 2. The system memory is only read-accessible, whatever the protection level (0, 1 or 2) and execution mode. 3. Option bytes are accessible only through the flash memory interface registers and OPSTRT bit. 4. The flash main memory is erased when the RDP option byte changes from level 1 to level 0. 5. SWAP_BANK user option can be modified. 6. OTP can be written only once. 7. The backup registers are erased when RDP changes from level 1 to level 0. 8. All SRAMs are erased when RDP changes from level 1 to level 0. Table 4. Access status versus protection level and execution modes when TZEN = 1 Area RDP level User execution (boot from flash memory) Debug/bootloader(1) Read Write Erase Read Write Erase Flash main memory 0.5 Yes Yes Yes Yes(2) Yes(2) Yes(2) 1 Yes Yes Yes No No No(5) 2 Yes Yes Yes N/A N/A N/A System memory(3) 0.5 Yes No No Yes No No 1 Yes No No Yes No No 2 Yes No No N/A N/A N/A Option bytes(4) 0.5 Yes Yes(5) N/A Yes Yes (5) N/A 1Yes Yes(5) N/A Yes Yes(5) N/A 2Yes No(6) N/A N/A N/A N/A |
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