| Electronic Components Datasheet Search |
|
STM32WBA62CGF6 Datasheet(PDF) 24 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32WBA62CGF6 Datasheet(HTML) 24 Page - STMicroelectronics |
|
24 / 185 page ![]() Functional overview STM32WBA6xxx 24/185 DS14736 Rev 1 • Interrupts: – NVIC: All interrupts are secure after reset. NVIC is banked for secure and nonsecure state. – TZIC: All illegal access interrupts are disabled after reset. 3.8 Boot modes At startup, a BOOT0 pin, nBOOT0 and NSBOOTADDx[24:0] (x = 0, 1), and SECBOOTADD0[24:0] option bytes are used to select the boot memory address that includes: • Boot from any address in user flash memory • Boot from system memory bootloader • Boot from any address in embedded SRAM • Boot from RSS (root security services) The BOOT0 value comes from the PH3-BOOT0 pin or from an option bit, depending upon the value of a user option bit to free the GPIO pad if needed. The bootloader is located in the system memory, programmed by ST during production. It is used to program the flash memory by using USART, I2C, SPI or USB OTG in device mode. The bootloader is available on all devices. Refer to AN2606 STM32 microcontroller system memory boot mode, available on www.st.com, for more details. The RSS are embedded in the flash memory area named secure information block, programmed during ST production. For example, the RSS enables the SFI (secure firmware installation), thanks to the RSSe (RSS extension firmware). This feature allows the customers to produce the confidentiality of the firmware to be provisioned into the STM32, when production is subcontracted to untrusted third party. The RSS is available on all devices, after enabling the TrustZone through the TZEN option bit. Refer to AN4992 STM32 MCUs secure firmware install (SFI) overview, available on www.st.com, for more details. Refer to Table 6 and Table 7, respectively, for boot modes with TrustZone disabled and enabled. Table 6. Boot modes when TrustZone is disabled (TZEN = 0) nBOOT0 FLASH_ OPTR[27] BOOT0 pin PH3 nSWBOOT0 FLASH_ OPTR[26] Boot address option-bytes selection Boot area ST programmed default value - 0 1 NSBOOTADD0[24:0] Boot address defined by user option bytes NSBOOTADD0[24:0] Flash memory: 0x08000 000 - 1 1 NSBOOTADD1[24:0] Boot address defined by user option bytes NSBOOTADD1[24:0] System bootloader: 0x0BF9 0000 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |