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STM32WBA62CGF6 Datasheet(PDF) 168 Page - STMicroelectronics |
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STM32WBA62CGF6 Datasheet(HTML) 168 Page - STMicroelectronics |
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168 / 185 page  Electrical characteristics STM32WBA6xxx 168/185 DS14736 Rev 1 5.3.33 JTAG/SWD interface characteristics Unless otherwise specified, the parameters given in Table 100 and Table 101 are with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at 0.5 x VDD • I/O compensation cell disabled Table 100. JTAG characteristics(1) 1. Evaluated by characterization, not tested in production. Symbol Parameter Conditions Min Typ 3.3 V Max Unit fTCK TCK clock frequency 2.7 ≤ VDD ≤ 3.6 V - - 21.5 MHz 1.71 ≤ VDD < 2.7 V - - 16.5 tisu(TMS) TMS input setup time - 1.5 - - ns tih(TMS) TMS input hold time - 6 - - tisu(TDI) TDI input setup time - 1.5 - - tih(TDI) TDI input hold time - 4 - - tov(TDO) TDO output valid time 2.7 ≤ VDD ≤ 3.6 V - 17 23 1.71 ≤ VDD < 2.7 V - 17 29.5 toh(TDO) TDO output hold time - 13 - - Table 101. SWD characteristics(1) 1. Evaluated by characterization, not tested in production. Symbol Parameter Conditions Min Typ 3.3 V Max Unit fSWCLK SWCLK clock frequency 2.7 ≤ VDD ≤ 3.6 V - - 62.5 MHz 1.71 ≤ VDD < 2.7 V - - 34 tisu(SWDIO) SWDIO input setup time - 1.5 - - ns tih(SWDIO) SWDIO input hold time - 3.5 - - tov(SWDIO) SWDIO output valid time 2.7 ≤ VDD ≤ 3.6 V - 12 16 1.71 ≤ VDD < 2.7 V - 12 29 toh(SWDIO) SWDIO output hold time - 8.5 - - |
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