6.42

7024S/L

High-Speed 4K x 16 Dual-Port Static RAM

Military, Industrial and Commercial Temperature Ranges

12

Feb.20.20

Timing Waveform of Semaphore Read after Write Timing, Either Side(1)

NOTES:

1. CE = VIH or UB & LB = VIH for the duration of the above timing (both write and read cycle).

2. “DATAOUT VALID” represents all I/O's (I/O0-I/O15) equal to the semaphore value.

NOTES:

1. D0R = D0L = VIL, CER = CEL = VIH, or both UB & LB = VIH, semaphore flag is released from both sides (reads as ones from both sides) at cycle start.

2. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.

3. This parameter is measured from R/WA or SEMA going HIGH to R/WB or SEMB going HIGH.

4. If tSPS is not satisfied, there is no guarantee which side will obtain the semaphore flag.

Timing Waveform of Semaphore Write Contention(1,3,4)

SEM

2740 drw 11

tAW

tEW

tSOP

I/O0

VALID ADDRESS

tSAA

R/

W

tWR

tOH

tACE

VALID ADDRESS

DATAIN

VALID

DATAOUT

tDW

tWP

tDH

tAS

tSWRD

tAOE

Read Cycle

Write Cycle

A0-A2

OE

VALID(2)

SEM"A"

2740 drw 12

tSPS

MATCH

R/

W"A"

MATCH

A0"A"-A2"A"

SIDE

"A"

(2)

SEM"B"

R/

W"B"

A0"B"-A2"B"

SIDE

(2)

"B"