7024SSLASHL datasheet(19/23 Pages) RENESAS

19 / 23 page

6.42

7024S/L

High-Speed 4K x 16 Dual-Port Static RAM

Military, Industrial and Commercial Temperature Ranges

Feb.20.20

it. If it was successful, it proceeds to assume control over the shared

resource.Ifitwasnotsuccessfulinsettingthelatch,itdeterminesthatthe

rightsideprocessorhassetthelatchfirst, hasthetokenandisusingthe

sharedresource.Theleftprocessorcantheneitherrepeatedlyrequest

thatsemaphore’sstatusorremoveitsrequestforthatsemaphoretoperform

anothertaskandoccasionallyattemptagaintogaincontrolofthetokenvia

thesetandtestsequence.Oncetherightsidehasrelinquishedthetoken,

theleftsideshouldsucceedingainingcontrol.

ThesemaphoreflagsareactiveLOW.Atokenisrequestedbywriting

azerointoasemaphorelatchandisreleasedwhenthesamesidewrites

aonetothatlatch.

The eight semaphore flags reside within the IDT7024 in a separate

memoryspacefromtheDual-PortRAM.This addressspaceisaccessed

byplacingaLOWinputontheSEMpin(whichactsasachipselectforthe

semaphore flags) and using the other control pins (Address, OE, and

R/W) as they would be used in accessing a standard Static RAM. Each

of the flags has a unique address which can be accessed by either side

throughaddresspinsA0–A2.Whenaccessingthesemaphores,noneof

the other address pins has any effect.

When writing to a semaphore, only data pin D0is used. If a low level

iswrittenintoanunusedsemaphorelocation,thatflagwillbesettoazero

on that side and a one on the other side (see Truth Table III). That

semaphorecannowonlybemodifiedbythesideshowingthezero.When

aoneiswrittenintothesamelocationfromthesameside,theflagwillbe

settoaoneforbothsides(unlessasemaphorerequestfromtheotherside

ispending)andthencanbewrittentobybothsides.Thefactthattheside

whichisabletowriteazerointoasemaphoresubsequentlylocksoutwrites

fromtheothersideiswhatmakessemaphoreflagsusefulininterprocessor

communications.(Athoroughdiscussionontheuseofthisfeaturefollows

shortly.) A zero written into the same location from the other side will be

storedinthesemaphorerequestlatchforthatsideuntilthesemaphoreis

freed by the first side.

Whenasemaphoreflagisread,itsvalueisspreadintoalldatabitsso

thataflagthatisaonereadsasaoneinalldatabitsandaflagcontaining

azeroreadsasallzeros.Thereadvalueislatchedintooneside’soutput

registerwhenthatside'ssemaphoreselect(SEM)andoutputenable(OE)

signalsgoactive.Thisservestodisallowthesemaphorefromchanging

stateinthemiddleofareadcycleduetoawritecyclefromtheotherside.

Becauseofthislatch,arepeatedreadofasemaphoreinatestloopmust

cause either signal (SEM or OE) to go inactive or the output will never

change.

AsequenceWRITE/READmustbeusedbythesemaphoreinorder

to guarantee that no system level contention will occur. A processor

requestsaccesstosharedresourcesbyattemptingtowriteazerointoa

semaphorelocation.Ifthesemaphoreisalreadyinuse,thesemaphore

requestlatchwillcontainazero,yetthesemaphoreflagwillappearasone,

a fact which the processor will verify by the subsequent read (see Truth

TableIII).Asanexample,assumeaprocessorwritesazerototheleftport

at a free semaphore location. On a subsequent read, the processor will

verifythatithaswrittensuccessfullytothatlocationandwillassumecontrol

overtheresourceinquestion.Meanwhile,ifaprocessorontherightside

attempts to write a zero to the same semaphore flag it will fail, as will be

verifiedbythefactthataonewillbereadfromthatsemaphoreontheright

side during subsequent read. Had a sequence of READ/WRITE been

usedinstead,systemcontentionproblemscouldhaveoccurredduringthe

gap between the read and write cycles.

Itisimportanttonotethatafailedsemaphorerequestmustbefollowed

by either repeated reads or by writing a one into the same location. The

reasonforthisiseasilyunderstoodbylookingatthesimplelogicdiagram

ofthesemaphoreflaginFigure4.Twosemaphorerequestlatchesfeed

into a semaphore flag. Whichever latch is first to present a zero to the

semaphoreflagwillforceitssideofthesemaphoreflagLOWandtheother

side HIGH. This condition will continue until a one is written to the same

semaphorerequestlatch.Shouldtheotherside’ssemaphorerequestlatch

havebeenwrittentoazerointhemeantime,thesemaphoreflagwillflip

overtotheothersideassoonasaoneiswrittenintothefirstside’srequest

latch.Thesecondside’sflagwillnowstayLOWuntilitssemaphorerequest

latchiswrittentoaone.Fromthisitiseasytounderstandthat,ifasemaphore

is requested and the processor which requested it no longer needs the

resource, the entire system can hang up until a one is written into that

semaphorerequestlatch.

The critical case of semaphore timing is when both sides request

a single token by attempting to write a zero into it at the same time.

The semaphore logic is specially designed to resolve this problem.

If simultaneous requests are made, the logic guarantees that only one

sidereceivesthetoken.Ifonesideisearlierthantheotherinmakingthe

request, the first side to make the request will receive the token. If both

requestsarriveatthesametime,theassignmentwillbearbitrarilymade

to one port or the other.

One caution that should be noted when using semaphores is that

semaphoresalonedonotguaranteethataccesstoaresourceissecure.

Aswithanypowerfulprogrammingtechnique,ifsemaphoresaremisused

or misinterpreted, a software error can easily happen.

Initializationofthesemaphoresisnotautomaticandmustbehandled

viatheinitializationprogramatpower-up.Sinceanysemaphorerequest

flagwhichcontainsazeromustberesettoaone,allsemaphoresonboth

sidesshouldhaveaonewrittenintothematinitializationfrombothsides

to assure that they will be free when needed.

UsingSemaphores—SomeExamples

Perhapsthesimplestapplicationofsemaphoresistheirapplicationas

resourcemarkersfortheIDT7024’sDual-PortRAM.Saythe4Kx16RAM

was to be divided into two 2K x 16 blocks which were to be dedicated at

any one time to servicing either the left or right port. Semaphore 0 could

be used to indicate the side which would control the lower section of

memory,andSemaphore1couldbedefinedastheindicatorfortheupper

sectionofmemory.

To take a resource, in this example the lower 2K of Dual-Port RAM,

the processor on the left port could write and then read a zero in to

Semaphore0.Ifthistaskweresuccessfullycompleted(azerowasread

back rather than a one), the left processor would assume control of the

lower2K.Meanwhiletherightprocessorwasattemptingtogaincontrolof

theresourceaftertheleftprocessor,itwouldreadbackaoneinresponse

to the zero it had attempted to write into Semaphore 0. At this point, the

softwarecouldchoosetotryandgaincontrolofthesecond2Ksectionby

writing,thenreadingazerointoSemaphore1.Ifitsucceededingaining

control,itwouldlockouttheleftside.

Once the left side was finished with its task, it would write a one to

Semaphore 0 and may then try to gain access to Semaphore 1. If

Semaphore1wasstilloccupiedbytherightside,theleftsidecouldundo

itssemaphorerequestandperformothertasksuntilitwasabletowrite,then

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