EMC2104 datasheet(64/101 Pages) SMSC

64 / 101 page

Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown

Datasheet

Revision 1.74 (05-08-08)

SMSC EMC2104

DATASHEET

APPLICATION NOTE: If any of the External Diode 1, External Diode 2, External Diode 3 is configured to operate

as a voltage input, then the corresponding temperature high and low limit registers are

compared against the measured voltage. The data format is the same as the measured

voltage and these registers should be updated accordingly.

Additionally, the EMC2104 contains low limits for all temperature channels. If the temperature channel

drops below the low limit, then the appropriate status bit is set and the ALERT# pin are asserted (if

enabled).

All Limit Registers are Software Locked.

6.20

Fan Setting Registers

The Fan 1 Setting Register always displays the current setting of the Fan 1 Driver.Likewise, the Fan

2 Setting Register always displays the current setting of the Fan 2 driver. Reading from either register

will report the current fan speed setting of the appropriate fan driver regardless of the operating mode.

Therefore it is possible that reading from this register will not report data that was previously written

into this register.

While the RPM based Fan Speed Control Algorithm or the Look Up Table are active (or both), then

the register is read only. Writing to the register will have no affect and the data will not be stored.

If both the RPM based Fan Control Algorithm and the Look Up Table are disabled, then the register

will be set with the previous value that was used. The register is read / write and writing to this register

will affect the fan speed.

If the Fan 2 fan driver is disabled and the DAC2 / PWM2 / GPIO2 and TACH2 / GPIO1 pins are used

as GPIOs, then the Fan 2 Setting Register will read 00h.

The contents of the register represent the weighting of each bit in determining the final output voltage.

The output drive for a PWM output is given by Equation [2].

6.21

PWM 1 and 2 Divide Registers

Table 6.26 Fan Driver Setting Register

ADDR

R/W

DEFAULT

40h

R/W

Fan 1 Setting

128

00h

80h

R/W

Fan 2 Setting

128

00h

[2]

Table 6.27 PWM 1 and 2 Divide Registers

ADDR

R/W

DEFAULT

41h

R/W

PWM 1 Divide

128

01h

81h

R/W

PWM 2 Divide

128

01h

Drive

VALUE

255

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EMC2104 Datasheet(PDF) 64 Page - SMSC Corporation

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