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R5F2L3ACBNFP Datasheet(PDF) 185 Page - Renesas Technology Corp |
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R5F2L3ACBNFP Datasheet(HTML) 185 Page - Renesas Technology Corp |
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185 / 848 page ![]() REJ09B0441-0010 Rev.0.10 Jul 30, 2008 Page 149 of 809 Under development Preliminary specification Specifications in this manual are tentative and subject to change. 10. Power Control R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group, R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group 10.2.4 Oscillation Stop Detection Register (OCD) Notes: 1. Set bits OCD1 to OCD0 to 00b before the MCU enters stop mode, high-speed on-chip oscillator mode, or low- speed on-chip oscillator mode (XIN clock stops). 2. When the OCD2 bit is set to 1 (on-chip oscillator clock selected), the CM14 bit is set to 0 (low-speed on-chip oscillator on). 3. The OCD2 bit is automatically set to 1 (on-chip oscillator clock selected) when the XIN clock oscillation stop is detected while bits OCD1 to OCD0 are set to 11b. When the OCD3 bit is set to 1 (XIN clock stops), the OCD2 bit remains unchanged even if 0 (XIN clock selected) is written to it. 4. The OCD3 bit is enabled when the OCD0 bit is set to 1 (oscillation stop detection function enabled). 5. The OCD3 bit remains 0 (XIN clock oscillates) when bits OCD1 to OCD0 are set to 00b. 6. Refer to 9.7.1 How to Use Oscillation Stop Detection Function for the switching procedure when the XIN clock re-oscillates after detecting an oscillation stop. Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the OCD register. Address 000Ch Bit b7b6b5 b4b3b2 b1b0 Symbol — — — — OCD3 OCD2 OCD1 OCD0 After Reset 000 001 00 Bit Symbol Bit Name Function R/W b0 OCD0 Oscillation stop detection enable bit (6) 0: Oscillation stop detection function disabled (1) 1: Oscillation stop detection function enabled R/W b1 OCD1 Oscillation stop detection interrupt enable bit 0: Disabled (1) 1: Enabled R/W b2 OCD2 System clock select bit (3) 0: XIN clock selected (6) 1: On-chip oscillator clock selected (2) R/W b3 OCD3 Clock monitor bit (4, 5) 0: XIN clock oscillates 1: XIN clock stops R b4 — Reserved bits Set to 0. R/W b5 — b6 — b7 — |
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