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EP2S30 Datasheet(PDF) 68 Page - Altera Corporation

Part # EP2S30
Description  Stratix II Device Family
PDF  238 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2S30 Datasheet(HTML) 68 Page - Altera Corporation

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2–60
Altera Corporation
Stratix II Device Handbook, Volume 1
May 2007
PLLs & Clock Networks
Figure 2–40 shows a top-level diagram of the Stratix II device and PLL
floorplan.
Figure 2–40. PLL Locations
Figures 2–41 and 2–42 shows the global and regional clocking from the
fast PLL outputs and the side clock pins.
FPLL7CLK
FPLL10CLK
FPLL9CLK
CLK[8..11]
FPLL8CLK
CLK[3..0]
7
1
2
8
10
4
3
9
5
11
6
12
CLK[7..4]
CLK[15..12]
PLLs



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