TMS320VC5505 datasheet(33/141 Pages) TI

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TMS320VC5505

Fixed-Point Digital Signal Processor

www.ti.com

SPRS503A – JUNE 2009 – REVISED JULY 2009

Table 3-14. LCD Bridge Terminal Functions (continued)

SIGNAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

NAME

NO.

This pin is multiplexed between LCD Bridge and GPIO.

LCD_D[6]/

IPD

For LCD Bridge, it is LCD data pin 6.

I/O/Z

GP[16]

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

enabled or disabled via the PDINHIBR3 register.

This pin is multiplexed between LCD Bridge and GPIO.

LCD_D[5]/

IPD

For LCD Bridge, it is LCD data pin 5.

I/O/Z

GP[15]

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

enabled or disabled via the PDINHIBR3 register.

This pin is multiplexed between LCD Bridge and GPIO.

LCD_D[4]/

IPD

For LCD Bridge, it is LCD data pin 4.

I/O/Z

GP[14]

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

enabled or disabled via the PDINHIBR3 register.

This pin is multiplexed between LCD Bridge and GPIO.

LCD_D[3]/

IPD

For LCD Bridge, it is LCD data pin 3.

I/O/Z

GP[13]

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

enabled or disabled via the PDINHIBR3 register.

This pin is multiplexed between LCD Bridge and GPIO.

LCD_D[2]/

IPD

For LCD Bridge, it is LCD data pin 2.

I/O/Z

GP[12]

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

enabled or disabled via the PDINHIBR3 register.

This pin is multiplexed between LCD Bridge and SPI.

LCD_D[1]/

I/O/Z

DVDDIO

For LCD Bridge, it is LCD data pin 1.

SPI_TX

Mux control via the PPMODE bits in the EBSR.

This pin is multiplexed between LCD Bridge and SPI.

LCD_D[0]/

I/O/Z

DVDDIO

For LCD Bridge, it is LCD data pin 0.

SPI_RX

Mux control via the PPMODE bits in the EBSR.

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