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TMS320VC5505 Datasheet(PDF) 1 Page - Texas Instruments |
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TMS320VC5505 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 141 page ![]() 1 Fixed-Point Digital Signal Processor 1.1 TMS320VC5505 Features TMS320VC5505 Fixed-Point Digital Signal Processor www.ti.com SPRS503A – JUNE 2009 – REVISED JULY 2009 • High-Performance, Low-Power, TMS320C55x™ • Four Inter-IC Sound (I2S Bus™) for Data Fixed-Point Digital Signal Processor Transport – 16.67-, 10-ns Instruction Cycle Time • Device USB Port With Integrated 2.0 – 60-, 100-MHz Clock Rate High-Speed PHY that Supports: – One/Two Instruction(s) Executed per Cycle – USB 2.0 Full- and High-Speed Device – Dual Multipliers [Up to 200 Million • LCD Bridge With Asynchronous Interface Multiply-Accumulates per Second • Tightly-Coupled FFT Hardware Accelerator (MMACS)] • 10-Bit 4-Input Successive Approximation – Two Arithmetic/Logic Units (ALUs) (SAR) ADC – Three Internal Data/Operand Read Buses • Real-Time Clock (RTC) With Crystal Input, With and Two Internal Data/Operand Write Buses Separate Clock Domain, Separate Power – Fully Software-Compatible With C55x Supply Devices – Industrial Temperature Devices Available • Four Core Isolated Power Supply Domains: Analog, RTC, CPU and Peripherals, and USB • 320K Bytes Zero-Wait State On-Chip RAM, Composed of: • Four I/O Isolated Power Supply Domains: RTC – 64K Bytes of Dual-Access RAM (DARAM), I/O, EMIF I/O, USB PHY, and DVDDIO 8 Blocks of 4K x 16-Bit • Low-Power S/W Programmable Phase-Locked – 256K Bytes of Single-Access RAM Loop (PLL) Clock Generator (SARAM), 32 Blocks of 4K x 16-Bit • On-Chip ROM Bootloader (RBL) to Boot From • 128K Bytes of Zero Wait-State On-Chip ROM NAND Flash, NOR Flash, SPI EEPROM, or I2C (4 Blocks of 16K x 16-Bit) EEPROM • 16-/8-Bit External Memory Interface (EMIF) with • IEEE-1149.1 (JTAG™) Glueless Interface to: Boundary-Scan-Compatible – 8-/16-Bit NAND Flash, 1- and 4-Bit ECC • Up to 26 General-Purpose I/O (GPIO) Pins – 8-/16-Bit NOR Flash (Multiplexed With Other Device Functions) – Asynchronous Static RAM (SRAM) • 196-Terminal Pb-Free Plastic BGA (Ball Grid • Direct Memory Access (DMA) Controller Array) (ZCH Suffix) – Four DMA With 4 Channels Each • 1.05-V Core (60 MHz), 1.8-V, 2.5-V, 2.8-V, or (16-Channels Total) 3.3-V I/Os • Three 32-Bit General-Purpose Timers • 1.3-V Core (100 MHz), 1.8-V, 2.5-V, 2.8-V, or – One Selectable as a Watchdog and/or GP 3.3-V I/Os • Two MultiMedia Card/Secure Digital (MMC/SD) • Applications: Interfaces – Wireless Audio Devices (e.g., Headsets, • Universal Asynchronous Receiver/Transmitter Microphones, Speakerphones, etc.) (UART) – Echo Cancellation Headphones • Serial-Port Interface (SPI) With Four – Portable Medical Devices Chip-Selects – Voice Applications • Master/Slave Inter-Integrated Circuit (I2C – Industrial Controls Bus™) – Fingerprint Biometrics – Software Defined Radio Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document. PRODUCTION DATA information is current as of publication date. Copyright © 2009–2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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