TMS320VC5505 datasheet(53/141 Pages) TI

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TMS320VC5505

Fixed-Point Digital Signal Processor

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SPRS503A – JUNE 2009 – REVISED JULY 2009

Additionally, the EBSR controls the function of the upper bits of the EMIF address bus. Pins EM_A[20:15]

can be individually configured as GPIO pins through the Axx_MODE bits. When Axx_MODE = 1, the

EM_A[xx] pin functions as a GPIO pin. When Axx_MODE = 0, the EM_A[xx] pin retains its EMIF

functionality.

Before modifying the values of the external bus selection register, you must clock gate all affected

peripherals through the Peripheral Clock Gating Control Register . After the external bus selection register

has been modified, you must reset the peripherals before using them through the Peripheral Software

Reset Counter Register.

After the boot process is complete, the external bus selection register must be modified only once, during

device configuration. Continuously switching the EBSR configuration is not supported.

Reserved

PPMODE

SP1MODE

SP0MODE

R-0

R/W-000

R/W-00

Reserved

A20_MODE

A19_MODE

A18_MODE

A17_MODE

A16_MODE

A15_MODE

R-0

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Figure 4-2. External Bus Selection Register (EBSR) [1C00h]

Table 4-3. EBSR Register Bit Descriptions

BIT

NAME

DESCRIPTION

RESERVED

Reserved. Read-only, writes have no effect.

Parallel Port Mode Control Bits. These bits control the pin multiplexing of the LCD Controller, SPI,

UART, I2S2, I2S3, and GP[31:27, 20:18] pins on the parallel port. For more details, see Table 4-4,

LCD Controller, SPI, UART, I2S2, I2S3, and GP[31:27, 20:18] Pin Multiplexing.

000 = Mode 0 (16-bit LCD Controller). All 21 signals of the LCD Bridge module are routed to the 21

external signals of the parallel port.

001 = Mode 1 (SPI, GPIO, UART, and I2S2). 7 signals of the SPI module, 6 GPIO signals, 4

signals of the UART module and 4 signals of the I2S2 module are routed to the 21 external signals

of the parallel port.

010 = Mode 2 (8-bit LCD Controller and GPIO). 8-bits of pixel data of the LCD Controller module

and 8 GPIO are routed to the 21 external signals of the parallel port.

011 = Mode 3 (8-bit LCD Controller, SPI, and I2S3). 8-bits of pixel data of the LCD Controller

14:12

PPMODE

module, 4 signals of the SPI module, and 4 signals of the I2S3 module are routed to the 21 external

signals of the parallel port.

100 = Mode 4 (8-bit LCD Controller, I2S2, and UART). 8-bits of pixel data of the LCD Controller

module, 4 siignals of the I2S2 module, and 4 signals of the UART module are routed to the 21

external signals of the parallel port.

101 = Mode 5 (8-bit LCD Controller, SPI, and UART). 8-bits of pixel data of the LCD Controller

module, 4 signals of the SPI module, and 4 signals of the UART module are routed to the 21

external signals of the parallel port.

110 = Mode 6 (SPI, I2S2, I2S3, and GPIO). 7 signals of the SPI module, 4 signals of the I2S2

module, 4 signals of the I2S3 module, and 6 GPIO are routed to the 21 external signals of the

parallel port.

111 = Reserved.

Serial Port 1 Mode Control Bits. The bits control the pin multiplexing of the MMC1, I2S1, and GPIO

pins on serial port 1. For more details, see Table 4-5, MMC1, I2S1, and GP[11:6] Pin Multiplexing.

00 = Mode 0 (MMC/SD1). All 6 signals of the MMC/SD1 module are routed to the 6 external signals

of the serial port 1.

11:10

SP1MODE

01 = Mode 1 (I2S1 and GP[11:10]). 4 signals of the I2S1 module and 2 GP[11:10] signals are

routed to the 6 external signals of the serial port 1.

10 = Mode 2 (GP[11:6]). 6 GPIO signals (GP[11:6]) are routed to the 6 external signals of the serial

port 1.

11 = Reserved.

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