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AT90SCR100 Datasheet(PDF) 215 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 215 Page - ATMEL Corporation |
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215 / 433 page ![]() 215 TPR0327AY–SMS–30Jan09 AT90SCR100 17.5.13 IN Pipe management 17.5.13.1 “Manual” mode When the Host requires data from the device, the firmware has to determine first the IN mode to use using the INMODE bit: • UPCRX.INMODE = 0. The UPINRQX register is taken in account. The Host controller will perform (UPINRQX+1) IN requests on the selected Pipe before freezing the Pipe. This mode avoids to have extra IN requests on a Pipe. • UPCRX.INMODE = 1. The USB controller will perform infinite IN request until the firmware freezes the Pipe. The IN request generation will start when the firmware clear the UPCRX.PFREEZE bit. Each time the current bank is full, the UPINTX.RXINI and the UPINTX.FIFOCON bits are set. This triggers an interrupt if the UPIENX.RXINE bit is set. The firmware can acknowledge the USB interrupt by clearing the UPINTX.RXINI bit. The Firmware reads the data and clears the UPINTX.FIFOCON bit in order to free the current bank. If the IN Pipeis composed of multiple banks, clearing the UPINTX.FIFOCON bit will switch to the next bank. The RXINI and FIFOCON bits are then updated by hardware in accordance with the status of the new bank. Figure 17-8. Example of IN Data bank Management The Pipe must be configured first. Note IN ACK DATA (to Bank 0) UPINTX.RXINI SW SW UPINTX.FIFOCON SW Read data from CPU Bank 0 Read data from CPU Bank 0 HW IN ACK DATA (to Bank 0) HW Example with 1 IN data bank IN ACK DATA (to Bank 0) UPINTX.RXINI SW SW UPINTX.FIFOCON SW Read data from CPU Bank 0 Read data from CPU Bank 1 HW IN ACK DATA (to Bank 1) HW Example with 2 IN data banks |
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