AMPL138ZCE3 datasheet(14/268 Pages) TI

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3.4.5

Advanced High-Performance Bus (AHB)

3.4.6

Embedded Trace Macrocell (ETM) and Embedded Trace Buffer (ETB)

3.4.7

ARM Memory Mapping

OMAP-L138 Low-Power Applications Processor

SPRS586A – JUNE 2009 – REVISED AUGUST 2009

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The ARM Subsystem uses the AHB port of the ARM926EJ-S to connect the ARM to the Config bus and

the external memories. Arbiters are employed to arbitrate access to the separate D-AHB and I-AHB by the

Config Bus and the external memories bus.

To support real-time trace, the ARM926EJ-S processor provides an interface to enable connection of an

Embedded Trace Macrocell (ETM). The ARM926ES-J Subsystem in the OMAP-L138 also includes the

Embedded Trace Buffer (ETB). The ETM consists of two parts:

• Trace Port provides real-time trace capability for the ARM9.

• Triggering facilities provide trigger resources, which include address and data comparators, counter,

and sequencers.

The OMAP-L138 trace port is not pinned out and is instead only connected to the Embedded Trace Buffer.

The ETB has a 4KB buffer memory. ETB enabled debug tools are required to read/interpret the captured

trace data.

By default the ARM has access to most on and off chip memory areas, including the DSP Internal

memories, EMIFA, DDR2, and the additional 128K byte on chip shared SRAM. Likewise almost all of the

on chip peripherals are accessible to the ARM by default.

See Table 3-3 for a detailed top level OMAP-L138 memory map that includes the ARM memory space.

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AMPL138ZCE3 Datasheet(PDF) 14 Page - Texas Instruments