PIC16F1933-ESLASHP datasheet(335/418 Pages) MICROCHIP

335 / 418 page

Preliminary

DS41364A-page 333

PIC16F193X/LF193X

24.0

POWER-DOWN MODE (SLEEP)

The Power-down mode is entered by executing a

SLEEP

instruction.

If the Watchdog Timer is enabled:

• WDT will be cleared but keeps running.

•PD bit of the STATUS register is cleared.

•TO bit of the STATUS register is set.

• Oscillator driver is turned off.

• Timer1 oscillator is unaffected

• I/O ports maintain the status they had before

SLEEP

was executed (driving high, low or high-

impedance).

For lowest current consumption in this mode, all I/O

pins should be either at VDD or VSS, with no external

circuitry drawing current from the I/O pin. I/O pins that

are high-impedance inputs should be pulled high or low

externally to avoid switching currents caused by float-

ing inputs. The T0CKI input should also be at VDD or

VSS for lowest current consumption. The contribution

from on-chip pull-ups on PORTB should be considered.

Enabled Resets remain functional during Sleep.

24.1

Wake-up from Sleep

The device can wake-up from Sleep through one of the

following events:

External Reset input on MCLR pin, if enabled.

BOR Reset, if enabled.

Watchdog

Timer

wake-up

(if

WDT

was

enabled).

Any external interrupt.

Certain peripheral interrupts (see individual

peripheral for more information).

The first two events will cause a device Reset. The last

three events are considered a continuation of program

execution. The TO and PD bits in the STATUS register

can be used to determine the cause of device Reset.

The PD bit, which is set on power-up, is cleared when

Sleep is invoked. TO bit is cleared if WDT wake-up

occurred.

Certain peripherals cannot generate interrupts since

during Sleep, no on-chip clocks are present.

When the SLEEP instruction is being executed, the next

instruction (PC + 1) is prefetched. For the device to

wake-up through an interrupt event, the corresponding

interrupt enable bit must be set (enabled). Wake-up is

regardless of the state of the GIE bit. If the GIE bit is

clear (disabled), the device continues execution at the

instruction after the SLEEP instruction. If the GIE bit is

set (enabled), the device executes the instruction after

the SLEEP instruction, then branches to the interrupt

address (0004h). In cases where the execution of the

instruction following SLEEP is not desirable, the user

should have a NOP after the SLEEP instruction.

The WDT is cleared when the device wakes up from

Sleep, regardless of the source of wake-up.

Note:

If the global interrupts are disabled (GIE is

cleared), but any interrupt source has both

its interrupt enable bit and the correspond-

ing interrupt flag bits set, the device will

immediately wake-up from Sleep. The

SLEEP

instruction is completely executed.

PIC16F1933-E/P Datasheet(PDF) 335 Page - Microchip Technology

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