ADT7462ACPZ-R7 datasheet(49/81 Pages) ONSEMI

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ADT7462

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The freewheeling test procedure is as follows:

1. PWM1 and PWM2 go to full speed, and PWM3

and PWM4 are switched off.

2. After the spin−up time of PWM1 and PWM2 has

elapsed, the speed of Fan 1, Fan 2, Fan 3, and

Fan 4 is measured.

3. After the speed of Fan 1 and Fan 2 is measured,

PWM1 is switched off and PWM3 is spun up.

After the spin−up time for PWM3 has elapsed, the

speed of Fan 5 and Fan 6 is measured.

4. After the speed of Fan 3 and Fan 4 is measured,

PWM2 is switched off and PWM4 is switched on.

After the spin−up time of PWM4 has elapsed, the

speed of Fan 7 and Fan 8 is measured.

5. After the speed of all eight fans has been

measured, the TACH and PWM configurations

return to their previous values.

• Fans must be in continuous mode for the

freewheeling test; that is, the dc bits must be set

(Register 0x08).

• To enable the freewheeling test, set the

freewheeling test enable register (0x1E) to a

nonzero value. Set Bit 0 = 1 to enable the

freewheeling test for Fan 1, and set Bit 1 for Fan 2,

all the way to Bit 7 for Fan 8. The freewheeling

test enable register should be programmed after the

fans present register is programmed. If the fans

present register is not programmed first, then the

values in the two registers do not match, and the

ADT7462 assumes that a fan is missing.

The following registers must be programmed for the fan

freewheeling test:

Fans Present Register (0x1D)

Set Bit 0 to 1 when a fan is connected to TACH1.

Set Bit 1 to 1 when a fan is connected to TACH2.

Set Bit 2 to 1 when a fan is connected to TACH3.

Set Bit 3 to 1 when a fan is connected to TACH4.

Set Bit 4 to 1 when a fan is connected to TACH5.

Set Bit 5 to 1 when a fan is connected to TACH6.

Set Bit 6 to 1 when a fan is connected to TACH7.

Set Bit 7 to 1 when a fan is connected to TACH8.

Fan Freewheeling Test Enable Register (0x1E)

Set Bit 0 to 1 to enable the freewheeling test for Fan 1.

Set Bit 1 to 1 to enable the freewheeling test for Fan 2.

Set Bit 2 to 1 to enable the freewheeling test for Fan 3.

Set Bit 3 to 1 to enable the freewheeling test for Fan 4.

Set Bit 4 to 1 to enable the freewheeling test for Fan 5.

Set Bit 5 to 1 to enable the freewheeling test for Fan 6.

Set Bit 6 to 1 to enable the freewheeling test for Fan 7.

Set Bit 7 to 1 to enable the freewheeling test for Fan 8.

Fan Freewheeling Test Register (0x1C)

Both the Fans Present register (0x1D) and the

freewheeling test enable register (0x1E) should be

programmed before setting the relevant bits in the fan

freewheeling test register (0x1C). The host fan status

the test.

THERM I/O Operation

This section describes the operation of THERM1 and

THERM2. Pin 28 and Pin 29 can both be configured as

THERM inputs or outputs.

THERM Output

THERM

is not enabled as an output by default on powerup,

but it can be enabled by setting the appropriate bits in

and THERM2 can be configured to assert whenever a

specific channel exceeds the specified THERM limit (see

Table 30).

Table 26. THERM Output Channel Select and Limits

Channel

Enable

Configuration

Limit Registers

THERM1,

0x0E

THERM2,

0x0F

THERM1

THERM2

Local

Bit 1 = 1

0x4C

0x50

Remote 1

Bit 2 = 1

0x4D

0x51

Remote 2

Bit 3 = 1

0x4E

0x52

Remote 3

Bit 4 = 1

0x4F

0x53

As an output, THERM is asserted low to signal that the

measured THERM temperature has exceeded pre−

programmed THERM temperature limits. The output is

automatically pulled high again when the temperature falls

below the (THERM − Hysteresis) limit. The value of

hysteresis for each channel is programmable in Register

0x54 and Register 0x55, where 1 LSB = 1

°C, and the

maximum hysteresis for each channel is 15

°C.

Setting the THERM boost bits, Bit 0 and Bit 1, to Logic 0

(default setting) in the THERM configuration register

(0x0D), sets the fans to full speed on an internal THERM

event.

THERM Input

configure

THERM

input,

the

THERM1_Timer_Enable (T1TE) bit (Bit 0) in the

THERM1 configuration register (0x0E) and the

THERM2_Timer_Enable (T2TE) bit (Bit 0) in the

THERM2 configuration register (0x0F) must be set to

Logic 1. The ADT7462 can then be used to detect when the

THERM pins are asserted low. The THERM pins can be

connected to a trip point temperature sensor or to the

PROCHOT output of a CPU.

With processor core voltages reducing all the time, the

threshold for the AGTL + PROCHOT output is also reduced

as new processors become available.

Because the THERM input is typically an AGTL + input,

the thresholds can be referenced to VCCP. By setting Bit 4 of

Configuration Register 3 (0x03) to 1, the THERM threshold

is 2/3

× VCCP, the correct threshold for an AGTL + signal.

The THERM assert bits in Host Thermal Status Register 2

ADT7462ACPZ-R7 Datasheet(PDF) 49 Page - ON Semiconductor

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