ADT7462ACPZ-R7 datasheet(63/81 Pages) ONSEMI

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ADT7462

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Table 40. Register 0x0C — Dynamic TMIN Control Register 2 (Note 1)

Bit

Name

R/W

Description

[2:0]

CYR1

R/W

Three−bit Remote 1 cycle value. These three bits define the delay time between making

subsequent TMIN adjustments in the control loop for the Remote 1 temperature channel, in

terms of number of monitoring cycles. The system has associated thermal time constants that

must be found to optimize the response of fans and the control loop.

Bits

Decrease cycle

Increase cycle

000

001

010

011

100

101

110

111

8 cycles (1 sec)

16 cycles (2 sec)

32 cycles (4 sec)

64 cycles (8 sec)

128 cycles (16 sec)

256 cycles (32 sec)

512 cycles (64 sec)

1024 cycles (128 sec)

16 cycles (2 sec)

32 cycles (4 sec)

64 cycles (8 sec)

128 cycles (16 sec)

256 cycles (32 sec)

512 cycles (64 sec)

1024 cycles (128 sec)

2048 cycles (256 sec)

[5:3]

CYR2

R/W

Three−bit Remote 2 cycle value. These three bits define the delay time between making

subsequent TMIN adjustments in the control loop for the Remote 2 temperature channel, in

terms of number of monitoring cycles. The system has associated thermal time constants that

must be found to optimize the response of fans and the control loop.

Bits

Decrease cycle

Increase Cycle

000

001

010

011

100

101

110

111

8 cycles (1 sec)

16 cycles (2 sec)

32 cycles (4 sec)

64 cycles (8 sec)

128 cycles (16 sec)

256 cycles (32 sec)

512 cycles (64 sec)

1024 cycles (128 sec)

16 cycles (2 sec)

32 cycles (4 sec)

64 cycles (8 sec)

128 cycles (16 sec)

256 cycles (32 sec)

512 cycles (64 sec)

1024 cycles (128 sec)

2048 cycles (256 sec)

Control Loop

Select

R/W

This bit allows the user to select between two control loops. 0 makes the control loop

backwards compatible with the ADT7463 and ADT7468. 1 = ADT7462 control loop (default).

Reserved

Reserved for future use.

1. POR = 0x40, Lock = Y, SW Reset = Y.

Table 41. Register 0x0D — THERM Configuration Register (Note 1)

Bit

Name

R/W

Description

Boost 1

R/W

Setting this bit to 0 causes the fans to go to maximum PWM on assertion of THERM1 as an

output. Setting this bit to 1 means that the fan speed is not affected when the THERM1

temperature limit is exceeded. Default = 0.

Boost 2

R/W

Setting this bit to 0 causes the fans to go to maximum PWM on assertion of THERM2 as an

output. Setting this bit to 1 means that the fan speed is not affected when the THERM2

temperature limit is exceeded. Default = 0.

[4:2]

THERM1 Timer

Window

R/W

These bits set the timer window for measuring THERM1 assertions.

000 = 0.25 sec

001 = 0.5 sec

010 = 1 sec

011 = 2 sec

100 = 4 sec

101 = 8 sec

110 = 8 sec

111 = 8 sec

[7:5]

THERM2 Timer

Window

R/W

These bits set the timer window for measuring THERM2 assertions.

000 = 0.25 sec

001 = 0.5 sec

010 = 1 sec

011 = 2 sec

100 = 4 sec

101 = 8 sec

110 = 8 sec

111 = 8 sec

1. POR = 0x00, Lock = Y, SW Reset = Y.

ADT7462ACPZ-R7 Datasheet(PDF) 63 Page - ON Semiconductor

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