ADT7462ACPZ-R7 datasheet(61/81 Pages) ONSEMI

61 / 81 page

ADT7462

http://onsemi.com

Table 34. Register 0x03 — Configuration Register 3 (Note 1)

Bit

Name

R/W

Description

GPIO_En

R/W

Setting this bit to 1 enables the GPIOs. Default = 0.

SCL_Timeout

R/W

1 = SCL timeout enabled. 0 = SCL timeout disabled = default.

SDA_Timeout

R/W

1 = SDA timeout enabled. 0 = SDA timeout disabled = default.

VID_Threshold

R/W

This bit sets the digital threshold for the VID digital inputs. 0 =default. 1 = low thresholds

selected = 0.65 V.

THERM_

Threshold

R/W

This bit sets the digital threshold for the THERM digital inputs. 0 =default. 1 = low thresholds

selected = 2/3 VCCP1 (Pin 23).

CI Reset

R/W

Setting this bit to 1 resets the chassis intrusion circuit. This bit clears itself. Default = 0.

XOR Tree

R/W

Setting this bit to 1 enables the XOR tree test. Default = 0.

V_Core_Low

R/W

Setting this bit to 1 enables V_core_low. Default = 0.

1. POR = 0x00, Lock = Y, SW Reset = Y.

Table 35. Register 0x07 — TACH Enable Register (Note 1)

Bit

Name

R/W

Description

TACH1

R/W

Setting this bit to 1 enables the TACH1 measurement. Default = 0.

TACH2

R/W

Setting this bit to 1 enables the TACH2 measurement. Default = 0.

TACH3

R/W

Setting this bit to 1 enables the TACH3 measurement. Default = 0.

TACH4

R/W

Setting this bit to 1 enables the TACH4 measurement. Default = 0.

TACH5

R/W

Setting this bit to 1 enables the TACH5 measurement. Default = 0.

TACH6

R/W

Setting this bit to 1 enables the TACH6 measurement. Default = 0.

TACH7

R/W

Setting this bit to 1 enables the TACH7 measurement. Default = 0.

TACH8

R/W

Setting this bit to 1 enables the TACH8 measurement. Default = 0.

1. POR = 0x00, Lock = Y, SW Reset = Y.

Table 36. Register 0x08 — TACH Configuration Register (Note 1)

Bit

Name

R/W

Description

DC 1/5

R/W

Setting this bit to 1 enables continuous measurements on TACH1 and TACH5 in low frequency

PWM mode. Continuous measurement means that pulse stretching is turned off and the PWM

output and TACH inputs are no longer synchronized. Default = 1.

DC 2/6

R/W

Setting this bit to 1 enables continuous measurements on TACH2 and TACH6 in low frequency

PWM mode. Continuous measurement means that pulse stretching is turned off and the PWM

output and TACH inputs are no longer synchronized. Default = 1.

DC 3/7

R/W

Setting this bit to 1 enables continuous measurements on TACH3 and TACH7 in low frequency

PWM mode. Continuous measurement means that pulse stretching is turned off and the PWM

output and TACH inputs are no longer synchronized. Default = 1.

DC 4/8

R/W

Setting this bit to 1 enables continuous measurements on TACH4 and TACH8 in low frequency

PWM mode. Continuous measurement means that pulse stretching is turned off and the PWM

output and TACH inputs are no longer synchronized. Default = 1.

[7:4]

Reserved

Reserved for future use.

1. POR = 0x0F, Lock = Y, SW Reset = Y.

ADT7462ACPZ-R7 Datasheet(PDF) 61 Page - ON Semiconductor

ADT7462ACPZ-R7 Datasheet(HTML) 61 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

Datasheet Download

Link URL