UJA1076 datasheet(16/47 Pages) NXP

16 / 47 page

UJA1076_2

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 02 — 27 May 2010

16 of 47

NXP Semiconductors

UJA1076

High-speed CAN core system basis chip

6.4.2 Watchdog Timeout behavior

The watchdog runs continuously in Timeout mode. It can be reset at any time by a

watchdog trigger. If the watchdog overflows, the cyclic interrupt (CI) bit is set. If a CI is

already pending, a system reset is performed.

The watchdog is in Timeout mode when pin WDOFF is LOW and:

• the SBC is in Standby mode and bit WMC = 0 or

• the SBC is in Normal mode and bit WMC = 1

6.4.3 Watchdog Off behavior

The watchdog is disabled in this state.

The watchdog is in Off mode when:

• the SBC is in Off, Overtemp or Sleep modes

• the SBC is in Standby mode and bit WMC = 1

• the SBC is in any mode and the WDOFF pin is HIGH

6.5 System reset

The following events will cause the SBC to perform a system reset:

• V1 undervoltage (reset pulse length selected via external pull-up resistor on RSTN

pin)

• An external reset (RSTN forced LOW)

• Watchdog overflow (Window mode)

• Watchdog overflow in Timeout mode with cyclic interrupt (CI) pending

• Watchdog triggered too early in Window mode

• WMC value changed in Normal mode

• WDOFF pin state changed

• SBC goes to Sleep mode (MC set to 01; see Table 5) while INTN is driven LOW

• SBC goes to Sleep mode (MC set to 01; see Table 5) while

STBCC = WIC1 = WIC2 = 0

• SBC goes to Sleep mode (MC set to 01; see Table 5) while wake-up pending

• Software reset (SWR = 1)

• SBC leaves Overtemp mode (reset pulse length selected via external pull-up resistor

on RSTN pin)

A watchdog overflow in Timeout mode requests a cyclic interrupt (CI), if a CI is not already

pending.

The UJA1076 provides three signals for dealing with reset events:

• RSTN input/output for performing a global ECU system reset or forcing an external

reset

• EN pin, a fail-safe global enable output

• LIMP pin, a fail-safe limp home output

UJA1076 Datasheet(PDF) 16 Page - NXP Semiconductors

UJA1076 Datasheet(HTML) 16 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

Datasheet Download

Link URL