SPMCK16Z4MPV20 datasheet(251/500 Pages) FREESCALE

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M68HC16 Z SERIES

MULTICHANNEL COMMUNICATION INTERFACE

USER’S MANUAL

10-11

10.3.5 SPI Serial Clock Baud Rate

Baud rate is selected by writing a value from two to 255 into SPBR[7:0] in the SPCR

of the master MCU. Writing an SPBR[7:0] value into the SPCR of the slave device has

no effect. The SPI uses a modulus counter to derive SCK baud rate from the MCU sys-

tem clock.

The following expressions apply to SCK baud rate:

Giving SPBR[7:0] a value of zero or one disables the baud rate generator. SCK is dis-

abled and assumes its inactive state value.

SPBR[7:0] has 254 active values. Table 10-4 lists several possible baud values and

the corresponding SCK frequency based on a 16.78-MHz system clock.

10.3.6 Wired-OR Open-Drain Outputs

Typically, SPI bus outputs are not open-drain unless multiple SPI masters are in the

system. If needed, the WOMP bit in SPCR can be set to provide wired-OR, open-drain

outputs. An external pull-up resistor should be used on each output line. WOMP af-

fects all SPI pins regardless of whether they are assigned to the SPI or used as gen-

eral-purpose I/O.

10.3.7 Transfer Size and Direction

The SIZE bit in the SPCR selects a transfer size of eight (SIZE = 0) or sixteen (SIZE

= 1) bits. The LSBF bit in the SPCR determines whether serial shifting to and from the

data register begins with the LSB (LSBF = 1) or MSB (LSBF = 0).

Table 10-4 SCK Frequencies

System Clock

Frequency

Required Division

Ratio

Value of SPBR Actual SCK Frequency

16.78 MHz

4.19 MHz

2.10 MHz

1.05 MHz

493 kHz

168

100 kHz

510

255

33 kHz

SCK Baud Rate

sys

SPBR[7:0]

-------------------------------------

SPBR[7:0]

sys

SCK Baud Rate Desired

--------------------------------------------------------------------------

Freescale Semiconductor, Inc.

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