SPMCK16Z4MPV20 datasheet(390/500 Pages) FREESCALE

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M68HC16 Z SERIES

D-16

USER’S MANUAL

This register contains seven 2-bit fields that determine the function of corresponding

chip-select pins. Bits [15:14] are not used. These bits always read zero; writes have

no effect. CSPAR0 bit 1 always reads one; writes to CSPAR0 bit 1 have no effect. The

alternate functions can be enabled by data bus mode selection during reset. This reg-

ister may be read or written at any time. After reset, software may enable one or more

pins as discrete outputs.

Table D-9 shows CSPAR0 pin assignments.

CSPAR1 contains five 2-bit fields that determine the functions of corresponding chip-

select pins. Bits [15:10] are not used. These bits always read zero; writes have no ef-

fect. Table D-10 shows CSPAR1 pin assignments, including alternate functions that

can be enabled by data bus mode selection during reset.

Table D-8 Pin Assignment Field Encoding

CSxPA[1:0]

Description

Discrete output1

NOTES:

1. Does not apply to the CSBOOT field.

Alternate function1

Chip-select (8-bit port)

Chip-select (16-bit port)

Table D-9 CSPAR0 Pin Assignments

CSPAR0 Field

Chip-Select Signal

Alternate Signal

Discrete Output

CS5PA[1:0]

CS5

FC2

PC2

CS4PA[1:0]

CS4

FC1

PC1

CS3PA[1:0]

CS3

FC0

PC0

CS2PA[1:0]

CS2

BGACK

—

CS1PA[1:0]

CS1

—

CS0PA[1:0]

CS0

—

CSBTPA[1:0]

CSBOOT

—

CSPAR1 — Chip-Select Pin Assignment Register 1

$YFFA46

CS10PA[1:0]

CS9PA[1:0]

CS8PA[1:0]

CS7PA[1:0]

CS6PA[1:0]

RESET:

DATA71

NOTES:

1. Refer to Table D-11 for CSPAR1 reset state information.

DATA

[7:6]1

DATA

[7:5]1

DATA

[7:4]1

DATA

[7:3]1

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