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SPMCK16Z4MPV20 Datasheet(PDF) 401 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 Datasheet(HTML) 401 Page - Freescale Semiconductor, Inc |
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401 / 500 page  M68HC16 Z SERIES REGISTER SUMMARY USER’S MANUAL D-27 D.4.2 ROM Array Base Address Registers The reset value of the shaded bits is user specified, but the bits can be written after reset to change the base address. If the values of ROMBAH bits ADDR[23:20] do not match that of ADDR19, the CPU16 cannot access the ROM array. ROMBAH and ROMBAL specify the ROM array base address. The reset state of these registers is specified at mask time. They can only be written when STOP = 1 and LOCK = 0. This prevents accidental remapping of the array. Because the 8-Kbyte ROM array in the MC68HC16Z2 and the MC68HC16Z3 must be mapped to an 8- Kbyte boundary, ROMBAL bits [12:0] always contain $0000. ROMBAH ADDR[15:8] read zero. D.4.3 ROM Signature Registers High Signature registers RSIGHI and RSIGLO contain a user-specified mask-programmed signature pattern. A user-specified signature algorithm provides the capability to verify ROM array contents. ROMBAH — ROM Array Base Address Register High $YFF824 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 ADDR 23 ADDR 22 ADDR 21 ADDR 20 ADDR 19 ADDR 18 ADDR 17 ADDR 16 RESET: 1 1 1 1 1 1 1 1 ROMBAL — ROM Array Base Address Register Low $YFF826 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ADDR 15 ADDR 14 ADDR 13 ADDR 12 ADDR 11 ADDR 10 ADDR 9 ADDR 8 ADDR 7 ADDR 6 ADDR 5 ADDR 4 ADDR 3 ADDR 2 ADDR 1 ADDR 0 RESET: 0 0 0 RSIGHI — ROM Signature Register High $YFF828 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 NOT USED RSP18 RSP17 RSP16 RESET: 0 0 0 RSIGLO — ROM Signature Register Low $YFF82A 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RSP15 RSP14 RSP13 RSP12 RSP11 RSP10 RSP9 RSP8 RSP7 RSP6 RSP5 RSP4 RSP3 RSP2 RSP1 RSP0 RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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