SPMCK16Z4MPV20 datasheet(403/500 Pages) FREESCALE

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M68HC16 Z SERIES

USER’S MANUAL

D-29

D.5 Analog-to-Digital Converter Module

Table D-24 ADC Module Address Map

Address1

NOTES:

1. Y = M111, where M is the logic state of the MM bit in the SIMCR

8 7

$YFF700

ADC Module Configuration Register (ADCMCR)

$YFF702

ADC Test Register (ADCTEST)

$YFF704

Not Used

$YFF706

Not Used

Port ADA Data Register (PORTADA)

$YFF708

Not Used

$YFF70A

Control Register 0 (ADCTL0)

$YFF70C

Control Register 1 (ADCTL1)

$YFF70E

Status Register (ADCSTAT)

$YFF710

Right-Justified Unsigned Result Register 0 (RJURR0)

$YFF712

Right-Justified Unsigned Result Register 1 (RJURR1)

$YFF714

Right-Justified Unsigned Result Register 2 (RJURR2)

$YFF716

Right-Justified Unsigned Result Register 3 (RJURR3)

$YFF718

Right-Justified Unsigned Result Register 4 (RJURR4)

$YFF71A

Right-Justified Unsigned Result Register 5 (RJURR5)

$YFF71C

Right-Justified Unsigned Result Register 6 (RJURR6)

$YFF71E

Right-Justified Unsigned Result Register 7 (RJURR7)

$YFF720

Left-Justified Signed Result Register 0 (LJSRR0)

$YFF722

Left-Justified Signed Result Register 1 (LJSRR1)

$YFF724

Left-Justified Signed Result Register 2 (LJSRR2)

$YFF726

Left-Justified Signed Result Register 3 (LJSRR3)

$YFF728

Left-Justified Signed Result Register 4 (LJSRR4)

$YFF72A

Left-Justified Signed Result Register 5 (LJSRR5)

$YFF72C

Left-Justified Signed Result Register 6 (LJSRR6)

$YFF72E

Left-Justified Signed Result Register 7 (LJSRR7)

$YFF730

Left-Justified Unsigned Result Register 0 (LJURR0)

$YFF732

Left-Justified Unsigned Result Register 1 (LJURR1)

$YFF734

Left-Justified Unsigned Result Register 2 (LJURR2)

$YFF736

Left-Justified Unsigned Result Register 3 (LJURR3)

$YFF738

Left-Justified Unsigned Result Register 4 (LJURR4)

$YFF73A

Left-Justified Unsigned Result Register 5 (LJURR5)

$YFF73C

Left-Justified Unsigned Result Register 6 (LJURR6)

$YFF73E

Left-Justified Unsigned Result Register 7 (LJURR7)

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