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SPMCK16Z4MPV20 Datasheet(PDF) 407 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 Datasheet(HTML) 407 Page - Freescale Semiconductor, Inc |
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407 / 500 page  M68HC16 Z SERIES REGISTER SUMMARY USER’S MANUAL D-33 CD:CA — Channel Selection Bits in this field select input channel or channels for A/D conversion. Conversion mode determines which channel or channels are selected for conversion and which result registers are used to store conversion results. Tables D-29 and D-30 contain a summary of the effects of ADCTL1 bits and fields. Table D-28 ADC Conversion Mode SCAN MULT S8CM MODE 0 0 0 Single 4-Conversion Single-Channel Sequence 0 0 1 Single 8-Conversion Single-Channel Sequence 0 1 0 Single 4-Conversion Multichannel Sequence 0 1 1 Single 8-Conversion Multichannel Sequence 1 0 0 Multiple 4-Conversion Single-Channel Sequences 1 0 1 Multiple 8-Conversion Single-Channel Sequences 1 1 0 Multiple 4-Conversion Multichannel Sequences 1 1 1 Multiple 8-Conversion Multichannel Sequences Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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