SPMCK16Z4MPV20 datasheet(175/500 Pages) FREESCALE

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M68HC16 Z SERIES

SYSTEM INTEGRATION MODULE

USER’S MANUAL

5-69

4. Set the BYTE field to lower byte when using a 16-bit port, as the external vector

for a 16-bit port is fetched from the lower byte. Set the BYTE field to upper byte

when using an 8-bit port.

If an interrupting device does not provide a vector number, an autovector acknowledge

must be generated, either by asserting the AVEC pin or by generating AVEC internally

using the chip-select option register. This terminates the bus cycle.

5.9.4 Chip-Select Reset Operation

The least significant bit of each of the 2-bit chip-select pin assignment fields in

CSPAR0 and CSPAR1 each have a reset value of one. The reset values of the most

significant bits of each field are determined by the states of DATA[7:1] during reset.

There are weak internal pull-up drivers for each of the data lines so that chip-select

operation is selected by default out of reset. However, the internal pull-up drivers can

be overcome by bus loading effects.

To ensure a particular configuration out of reset, use an active device to put the data

lines in a known state during reset. The base address fields in chip-select base ad-

dress registers CSBAR[0:10] and chip-select option registers CSOR[0:10] have the re-

set values shown in Table 5-25. The BYTE fields of CSOR[0:10] have a reset value of

“disable”, so that a chip-select signal cannot be asserted until the base and option reg-

isters are initialized.

Following reset, the MCU fetches the initial stack pointer and program counter values

from the exception vector table, beginning at $000000 in supervisor program space.

The CSBOOT chip-select signal is used to select an external boot device mapped to

a base address of $000000.

The MSB of the CSBTPA field in CSPAR0 has a reset value of one, so that chip-select

function is selected by default out of reset. The BYTE field in chip-select option register

CSORBT has a reset value of “both bytes” so that the select signal is enabled out of

reset. The LSB of the CSBOOT field, determined by the logic level of DATA0 during

reset, selects the boot ROM port size. When DATA0 is held low during reset, port size

is eight bits. When DATA0 is held high during reset, port size is 16 bits. DATA0 has a

weak internal pull-up driver, so that a 16-bit port is selected by default

Table 5-25 Chip-Select Base and Option Register Reset Values

Fields

Reset Values

Base address

$000000

Block size

2 Kbyte

Async/sync mode

Asynchronous mode

Upper/lower byte

Disabled

Read/write

Disabled

AS/DS

DSACK

No wait states

Address space

CPU space

IPL

Any level

Autovector

External interrupt vector

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SPMCK16Z4MPV20 Datasheet(PDF) 175 Page - Freescale Semiconductor, Inc

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