HT46R0664 datasheet(70/92 Pages) HOLTEK

70 / 92 page

Rev. 1.00

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Rev. 1.00

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HT46R0664

Enhanced A/D+LCD Type 8-Bit OTP MCU

A/D Converter Interrupt

The A/D Converter Interrupt is controlled by the termination of an A/D conversion process. An A/D

Converter Interrupt request will take place when the A/D Converter Interrupt request flag, ADF, is

set, which occurs when the A/D conversion process finishes. To allow the program to branch to its

respective interrupt vector address, the global interrupt enable bit, EMI, and A/D Interrupt enable bit,

ADE, must first be set. When the interrupt is enabled, the stack is not full and the A/D conversion

process has ended, a subroutine call to the A/D Converter Interrupt vector, will take place. When the

interrupt is serviced, the A/D Converter Interrupt flag, ADF, will be automatically cleared. The EMI

bit will also be automatically cleared to disable other interrupts.

Timer/Event Counter Interrupt

For a Timer/Event Counter interrupt to occur, the global interrupt enable bit, EMI, and the

corresponding timer interrupt enable bit, TnE, must first be set. An actual Timer/Event Counter

interrupt will take place when the Timer/Event Counter request flag, TnF, is set, a situation that will

occur when the relevant Timer/Event Counter verflows. When the interrupt is enabled, the stack is

not full and a Timer/Event Counter overflow occurs, a subroutine call to the relevant timer interrupt

vector, will take place. When the interrupt is serviced, the timer interrupt request flag, TnF, will be

automatically reset and the EMI bit will be automatically cleared to disable other interrupts.

Time Base Interrupts

Time Base Interrupts functions are to provide regular time signal in the form of an internal interrupt.

They are controlled by the overflow signals from their respective timer functions. When these

happens their respective interrupt request flags, TB0F or TB1F will be set. To allow the program to

branch to their respective interrupt vector addresses, the global interrupt enable bit, EMI and Time

Base enable bits, TB0E or TB1E, must first be set. When the interrupt is enabled, the stack is not

full and the Time Base overflows, a subroutine call to their respective vector locations will take

place. When the interrupt is serviced, the respective interrupt request flag, TB0F or TB1F, will be

automatically reset and the EMI bit will be cleared to disable other interrupts.

CTRL1 Register

Bit

Name

T0S1

T0S0

TB01

TB00

—

R/W

—

POR

—

Bit 7~6

Described elsewhere

Bit 5~4

TB01, TB00: Time base 0 period selection

00: fS/212

01: fS/213

10: fS/214

11: fS/215

Bit 3~0

Unimplemented, read as “0”

HT46R0664 Datasheet(PDF) 70 Page - Holtek Semiconductor Inc

HT46R0664 Datasheet(HTML) 70 Page - Holtek Semiconductor Inc

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