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LM4935RLEVAL Datasheet(PDF) 23 Page - Texas Instruments

Part # LM4935RLEVAL
Description  Audio Power Amplifier Series Audio Sub-System with Dual-Mode Stereo Headphone & Mono High Efficiency Loudspeaker Amplifiers and Multi-Purpose
PDF  91 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM4935RLEVAL Datasheet(HTML) 23 Page - Texas Instruments

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LM4935, LM4935RLEVAL
www.ti.com
SNAS296D – OCTOBER 2005 – REVISED MARCH 2006
4.2.6
PLL N DIVIDER CONFIGURATION REGISTER
This register is used to control the feedback divider of the PLL.
Table 4-7. PLL_N (0x03h)
Bits
Field
Description
7:0
PLL_N
Programs the PLL feedback divider as follows:
PLL_N
Feedback Divider Value
0 to 10
10
11
11
12
12
13
13
14
14
…
…
249
249
250 to 255
250
The N divider should be set such that the output of the divider is between 0.5 MHz and 5 MHz. (Fin/M)*N
will be the target resting VCO frequency, FVCO. The N divider should be set such that 40 MHz < (Fin/M)*N
< 60 MHz. Fin/M is often referred to as Fcomp (comparison frequency) or Fref (reference frequency), in this
document Fcomp is used.
The integer division of the N divider is derived from PLL_N such that:
For 9 < PLL_N < 251: N = PLL_N
(2)
NOTE
See Section 4.2.9 for further details.
4.2.7
PLL P DIVIDER CONFIGURATION REGISTER
This register is used to control the output divider of the PLL.
Table 4-8. PLL_P (0x04h)
Bits
Field
Description
0
RSVD
RESERVED
3:1
PLL_P
PLL_P
Output Divider Value
0002
1
0012
2
0102
3
0112
4
1002
5
1012
6
1102
7
1112
8
Copyright © 2005–2006, Texas Instruments Incorporated
Application Information
23
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Product Folder Links: LM4935 LM4935RLEVAL



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