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GMS81032 Datasheet(PDF) 41 Page - Hynix Semiconductor |
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GMS81032 Datasheet(HTML) 41 Page - Hynix Semiconductor |
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41 / 101 page  4 - 3 4.1.2 Prescaler Prescaler consists of 12-bit binary counter. The clock supplied from oscillation circuit is input to prescaler (fex). The divided output from each bit of prescaler is provided to peripheral hardware. 4.1.3 Peripheral hardware clock control Clock to peripheral hardware can be stopped by bit4 (ENPCK) of CKCTLR Register. ENPCK is set to ¡È1¡È in reset state. PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11 PS12 B.I.T Peripheral PS0 PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11 PS12 fex ENPCK fcpu fex(MHz) Freq Period(s) 4 PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10 PS11 PS12 PS0 2M 1M 500K 250K 125K 62.5K 31.25K 15.63K 7.183K 3.906K 1.953K 0.976K 4M 500n 1u 2u 4u 8u 16u 32u 64u 128u 256u 512u 1024u 250n Freq Period(s) 2 1M 500k 250K 125K 62.5K 31.25K 15.63K 7.183K 3.906K 1.953K 0.976K 2M 500n 1u 2u 4u 8u 16u 32u 64u 128u 256u 512u 1024u 0.488K 2048u Fig. 4.3 Block diagram of Prescaler Chapter 4. Peripheral Hardware |
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