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GMS81032 Datasheet(PDF) 73 Page - Hynix Semiconductor |
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GMS81032 Datasheet(HTML) 73 Page - Hynix Semiconductor |
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73 / 101 page  5 - 8 Interrupt vector of BRK instruction is shared by vector of Table Call(TCALL0). When both instruction of BRK and TCALL0 are used, as shown in Fig. 5.4 each processing routine is judged by contents of B flag. There is no instruction to reset directly B flag. B flag BRK INTERRUPT ROUTINE TCALL0 ROUTINE RETI RET BRK or TCALL0 0 1 Fig. 5.4 Execution of BRK or TCALL0 5.6 MULTIPLE INTERRUPT If there is an interrupt, Interrupt Mask Enable Flag is automatically cleared before entering the Interrupt Service Routine. After then, no interrupt is accepted. If EI instruction is executed, interrupt mask enable bit becomes ¡È1¡È, and each enable bit can accept interrupt request. When two or more interrupts are generated simultaneously, the highest priority interrupt set by Interrupt Mode Register is accepted. Chapter 5. Interrupt |
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