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GMS81032 Datasheet(PDF) 44 Page - Hynix Semiconductor |
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GMS81032 Datasheet(HTML) 44 Page - Hynix Semiconductor |
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44 / 101 page  4 - 6 - - WDTON ENPCK BTCL BTS2 BTS1 BTS0 CKCTLR W <00C7H> BTS2 0 0 7 0 4.1.4.3 Reading Basic Interval Timer By reading of the Basic Interval Timer Register(BITR), we can read counter value of B.I.T. Because B.I.T can be cleared or read, the spending time up to maximum 65.5ms can be available. B.I.T is read-only register. If B.I.T register is written, then CKCTLR register with same address is written. BTS1 0 0 BTS0 0 1 B.I.T. Input clock PS3 (2us) PS4 (4us) Standby release time 512 us 1,024 us 0 0 1 1 0 1 PS5 (8us) PS6 (16us) 2,048 us 4,096 us 1 1 0 0 0 1 PS7 (32us) PS8 (64us) 8,192 us 16,384 us 1 1 1 1 0 1 PS9 (128us) PS10 (256us) 32,768 us 65,536 us Table 4.1 Standby release time according to BTS BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 BITR R <00C7H> 7 0 Basic Interval Timer Register Chapter 4. Peripheral Hardware |
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