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GMS81032 Datasheet(PDF) 47 Page - Hynix Semiconductor |
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GMS81032 Datasheet(HTML) 47 Page - Hynix Semiconductor |
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47 / 101 page ![]() 4 - 9 - - WDTON ENPCK BTCL BTS2 BTS1 BTS0 CKCTLR W <00C7H> BTS2 0 0 7 0 BTS1 0 0 BTS0 0 1 Input clock of WDT Max. Interval of WDT output (*note1) 32,756 us 64,512 us 0 0 1 1 0 1 129,024 us 258,048 us 1 1 0 0 0 1 516,096 us 1,032,192 us 1 1 1 1 0 1 2,064,384 us 4,128,768 us *note1) When WDTR Register value is 63(3FH) Caution : Do not use ¡È0¡È for WDTR Register value. Device come into the reset state by WDT 512 us 1,024 us 2,048 us 4,096 us 8,192 us 16,384 us 32,768 us 65,536 us Chapter 4. Peripheral Hardware |
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