82375EB datasheet(36/131 Pages) INTEL

36 / 131 page

82375EBSB

Bit

Description

Reserved

MEMCS

Master Enable

When bit 4e1 the PCEB asserts MEMCS

for all accesses to the defined

MEMCS

region (as defined by the MCSTOM Register and excluding the memory hole defined by the

MCSBOH and MCSTOH Registers) if the accessed location is in a region enabled by bits 30 of this

MEMCS

function is disabled and MEMCS

is never asserted

Write Enable For 0F0000 – 0FFFFFh (Upper 64 KByte BIOS)

When bit 3e1 the PCEB generates

MEMCS

for PCI master memory write accesses to the address range 0F0000 – 0FFFFFh When bit

3e0 the PCEB does not generate MEMCS

for PCI master memory write accesses to the address

range 0F0000 – 0FFFFFh

Read Enable For 0F0000 – 0FFFFFh (Upper 64 KByte BIOS)

When bit 2e1 the PCEB generates

MEMCS

for PCI master memory read accesses to the address range 0F0000 – 0FFFFFh When bit

2e0 the PCEB does not generate MEMCS

for PCI master memory read accesses to the address

range 0F0000 – 0FFFFFh

Write Enable For 080000 – 09FFFFh (512 – 640 KByte)

When bit 1e1 the PCEB generates

MEMCS

for PCI master memory write accesses to the address range 080000 – 09FFFFh When bit

1e0 the PCEB does not generate MEMCS

for PCI master memory write accesses to the address

range 080000 – 09FFFFh

Read Enable For 080000 – 09FFFFh (512 – 640 KByte)

When bit 0e1 the PCEB generates

MEMCS

for PCI master memory read accesses to the address range 080000 – 09FFFFh When bit

0e0 the PCEB does not generate MEMCS

for PCI master memory read accesses to the address

range 080000 – 09FFFFh

3112 MCSBOHMEMCS

BOTTOM OF HOLE REGISTER

Address Offset

45h

Default value

10h

Attribute

ReadWrite

Size

8 bits

This register defines the bottom of the MEMCS

hole MEMCS

is not generated for accesses to addresses

within the hole defined by this register and the MCSTOH Register The hole is defined by the following

equation

TOH t address t BOH TOH is the top of the MEMCS

hole defined by the MCSTOH Register and BOH is

the bottom of the MEMCS

hole defined by this register

For example to program the BOH at 1 MByte the value of 10h should be written to this register To program

the BOH at 2 MByte a 64 KByte this register should be programmed to 21h To program the BOH at 8 MByte

this register should be programmed to 80h

When the TOH k BOH the hole is disabled If TOHeBOH the hole size is 64 KBytes It is the responsibility of

the programmer to guarantee that the BOH is at or above 1 MB AD 3124 must be 0’s for the hole meaning

the hole is restricted to be under the 16 MByte boundary The default value for the BOH and TOH disables the

hole

Bit

Description

Bottom of MEMCS

Hole

Bits 70 correspond to address lines AD 2316 respectively

82375EB Datasheet(PDF) 36 Page - Intel Corporation

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