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AN2950 Datasheet(PDF) 12 Page - STMicroelectronics |
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AN2950 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 37 page ![]() Testing the board AN2950 12/37 Doc ID 15494 Rev 1 2.2 Regulation precision and output voltage ripple The output voltage of the board has been measured with different line and load conditions. The results are reported in Table 5. The output voltage is not affected by the line condition. The VDD voltage has also been measured to verify that it is within the device’s operating range. As confirmed by the results reported in Table 5, the VDD voltage (unregulated auxiliary output) increases as the load on the regulated output increases. To prevent the VDD voltage from exceeding its operating range, an external clamp has been used (Dz, Rz). The ripple at the switching frequency superimposed at the output voltage has also been measured and the results are reported in Table 6. The board is provided with an LC filter to better filter the voltage ripple. Figure 11. Drain current and voltage at peak load 90 VAC Figure 12. Drain current and voltage at peak load 265 VAC Table 5. Output voltage and VDD line-load regulation VIN_AC (V) No load Half load Full load Peak load VOUT (V) VDD (V) VOUT (V) VDD (V) VOUT (V) VDD (V) VOUT (V) VDD (V) 90 5.02 10.8 4.99 18.8 4.99 19.6 4.98 20.5 115 5.02 10.4 4.99 18.7 4.99 19.5 4.98 20.3 230 5.02 10.3 4.99 18.6 4.99 19.4 4.98 20 265 5.02 10.1 4.99 18.5 4.99 19.2 4.98 19.8 Table 6. Output voltage ripple VIN_AC (V) Half load Full load Peak load VOUT (mV) VOUT (mV) VOUT (mV) 90 15 17 30 115 14 21 28 230 15 22 25 265 14 20 24 |
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