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PM0020 Datasheet(PDF) 36 Page - STMicroelectronics |
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PM0020 Datasheet(HTML) 36 Page - STMicroelectronics |
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36 / 87 page  STR91xFA Flash memory PM00020 36/87 1.15.2 Non-boot bank size register (FMI_NBBSR) Address: 5400 0004h Reset value: 0000 0000h 1.15.3 Boot bank base address register (FMI_BBADR) Address Offset: 5400 000Ch Reset value: 0000 0000h 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved NBBSIZE[3:0] rw rw rw rw Bits 31:4 Reserved, always read as 0 Bits 3:0 NBBSIZE[3:0]: Non-boot bank size These bits are set and cleared by software. They define the address space for the non booting memory bank,Boot bank size = 2 NBBSIZE[3:0] x 8Kbytes. 0000: 8 Kbytes. 0001: 16 Kbytes .... 1101: 64 Mbytes Other values are reserved. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved BBADDR[23:16] rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 BBADDR[15:0] rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw Bits 31:24 Reserved, always read as 0 Bits 23:0 BBADDR[23:0]: Boot bank base address These bits are set and cleared by software. They define the base address of the boot bank. The Flash Bank address BBADDR[23:0] is a word address and is mapped to CPU core address A[25:2]. The boot address defaults to "0" at reset. If the Boot Bank is re-mapped later to a different address, the base address must be at a bank size boundary of the remapped bank. Example (STR91xFAxx4) : for For Bank0, it must be at a 512KB boundary and at a 32KB boundary for Bank1. |
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