DocID027161 Rev 1

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AN4617

Peripheral migration

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2.10

Embedded SRAM

Basic difference between volatile memories is parity check supported by STM32F0 family

while L0 features by firewall protection.

The latest STM32F0 products feature memory of up to 32 KBytes with HW parity while

STM32L0 ones go up to 20 KBytes.

2.11

System of timers

Both STM32F0 and STM32L0 feature a set of general purpose timers with some small

differences, summarized in Table 12. In addition STM32F0 embeds an advanced control

timer. On the other side STM32L0 features a single 16-bit low power timer.

– complementary outputs

– programmable dead-time

– break input

– complementary PWM

– dead-time insertion, break input

– PWM edge aligned only

– PWM edge & center aligned

– ext. trigger

– encoder interface

Read Protection

Unprotection

Level 0 no protection

RDP = 0xAA

Level 0 no protection

RDP = 0xAA

Protection

Level 1 memory protection

RDP != (Level 2 & Level 0)

Level 2: Lvl 1 + Debug disabled,

RDP = 0xCC

Level 1 memory protection

RDP != (Level 2 & Level 0)

Level 2: Lvl 1 + Debug disabled,

RDP = 0xCC

Proprietary Code Read-Out Protection

Not available

Sector granularity (4KB)

Write protection

Protection by 4-Kbyte block

Protection by 4-Kbyte block

Table 11. Flash interface differences between STM32F0 and STM32L0 series (continued)

Feature

STM32F0 series

STM32L0 series

Table 12. Timers’ system differences between STM32F0 and STM32L0 series

Timer feature

STM32F0 series

STM32L0 series

Number of timers

1x 16-bit advanced control

up to 5x 16-bit general purpose

2x 16-bit basic

4x 16-bit general purpose

2x 16-bit basic

1x 16-bit low power

Advanced control

TIM1

Not available

General purpose

TIM15 / TIM16 / TIM17

TIM21 / TIM22

Synchronization

TIM15 only

TIM21 / TIM22