AN4661 datasheet(8/33 Pages) STMICROELECTRONICS

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Power supplies

AN4661

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DocID027559 Rev 1

1.2

Power supply scheme

•

VDD = 1.7 to 3.6 V: external power supply for I/Os and the internal regulator (when

enabled), provided externally through VDD pins. The VDD pins must be connected to

VDD with external decoupling capacitors: one single tantalum or ceramic capacitor

(min. 4.7 μF) for the package + one 100 nF ceramic capacitor for each VDD pin.

•

VSSA, VDDA = 1.7 to 3.6 V: external analog power supplies for ADC, DAC, Reset

blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS,

respectively.

The VDDA pin must be connected to two external decoupling capacitors (100 nF

ceramic + 1 μF tantalum or ceramic).

•

VDDUSB can be connected either to VDD or an external independent power supply

(3.0 to 3.6V) for USB transceivers. For example, when the device is powered at 1.8V,

an independent power supply 3.3V can be connected to VDDUSB.

The VDDUSB pin must be connected to two external decoupling capacitors (100 nF

ceramic + 1 μF tantalum or ceramic).

•

VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and

backup registers (through power switch) when VDD is not present.

The VBAT pin can be connected to the external battery (1.65 V < VBAT < 3.6 V). If no

external battery is used, it is recommended to connect this pin to VDD with a 100 nF

external ceramic decoupling capacitor.

Note:

VDD/VDDA minimum value of 1.7 V is obtained when the internal reset is OFF (refer to

Section 1.3.4: Internal reset OFF).

•

The VREF+ pin can be connected to the VDDA external power supply. If a separate,

external reference voltage is applied on VREF+, a 100 nF and a 1 μF capacitors must

be connected on this pin. In all cases, VREF+ must be kept between (VDDA-1.2 V) and

VDDA with minimum of 1.7 V.

•

Additional precautions can be taken to filter analog noise:

–

VDDA can be connected to VDD through a ferrite bead.

–

The VREF+ pin can be connected to VDDA through a resistor (typ. 47 Ω).

•

For the voltage regulator configuration, there is specific BYPASS_REG pin (not

available on all packages) that should be connected either to VSS or VDD to activate or

deactivate the voltage regulator specific.

–

Refer to the voltage regulator section of the related device datasheet for more

details.

•

When the voltage regulator is enabled, VCAP1 and VCAP2 pins must be connected to

2*2.2 μF low ESR < 2Ω ceramic capacitor.

AN4661 Datasheet(PDF) 8 Page - STMicroelectronics

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