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PIC16LC773-04/SP Datasheet(PDF) 171 Page - Microchip Technology |
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PIC16LC773-04/SP Datasheet(HTML) 171 Page - Microchip Technology |
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171 / 200 page ![]() PIC16C77X © 1999 Microchip Technology Inc. Advance Information DS30275A-page 171 FIGURE 15-14: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING TABLE 15-15 USART SYNCHRONOUS TRANSMISSION REQUIREMENTS FIGURE 15-15: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING TABLE 15-16 USART SYNCHRONOUS RECEIVE REQUIREMENTS Param No. Sym Characteristic Min Typ† Max Units Conditions 120* TckH2dtV SYNC XMIT (MASTER & SLAVE) Clock high to data out valid PIC16C774/773 — — 80 ns PIC16LC774/773 — — 100 ns 121* Tckrf Clock out rise time and fall time (Master Mode) PIC16C774/773 — — 45 ns PIC16LC774/773 — — 50 ns 122* Tdtrf Data out rise time and fall time PIC16C774/773 — — 45 ns PIC16LC774/773 — — 50 ns * These parameters are characterized but not tested. †: Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Parameter No. Sym Characteristic Min Typ† Max Units Conditions 125* TdtV2ckL SYNC RCV (MASTER & SLAVE) Data setup before CK ↓ (DT setup time) 15 —— ns 126* TckL2dtl Data hold after CK ↓ (DT hold time) 15 — — ns * These parameters are characterized but not tested. †: Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: Refer to Figure 15-3 for load conditions. 121 121 122 RC6/TX/CK RC7/RX/DT pin pin 120 Note: Refer to Figure 15-3 for load conditions. 125 126 RC6/TX/CK RC7/RX/DT pin pin |
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