PXA270 datasheet(39/126 Pages) INTEL

39 / 126 page

Electrical, Mechanical, and Thermal Specification

4-19

Intel® PXA270 Processor

Pin Listing and Signal Definitions

AD15

W14

GPIO<104

ICOC

GPIO<104>

CIF_DD<2>

—

Pd-0

Note[1]

Note [3]

PSKTSEL

KP_MKOUT<1

—

AB16

Y13

GPIO<105

ICOC

GPIO<105>

CIF_DD<1>

—

Pd-0

Note[1]

Note [3]

nPCE<2>

KP_MKOUT<2

—

AB15

W13

GPIO<106

ICOC

GPIO<106>

CIF_DD<9>

—

Pd-0

Note[1]

Note [3]

—

KP_MKOUT<3

—

AC15

AB14

GPIO<107

ICOC

GPIO<107>

CIF_DD<8>

—

Pd-0

Note[1]

Note [3]

—

KP_MKOUT<4

—

AD14

AA13

GPIO<108

ICOC

GPIO<108>

CIF_DD<7>

—

Pd-0

Note[1]

Note [3]

CHOUT<0>

KP_MKOUT<5

—

D17

D16

GPIO<109

ICOC

GPIO<109>

MMDAT<1>

MSSDIO

—

Pd-0

Note[1]

Note [3]

MMDAT<1>

MSSDIO

—

B17

C15

GPIO<110

ICOC

GPIO<110>

MMDAT<2>/

MMCCS<0>

——

Pd-0

Note[1]

Note [3]

MMDAT<2>/

MMCCS<0>

——

C17

A17

GPIO<111

ICOC

GPIO<111>

MMDAT<3>/

MMCCS<1>

——

Pd-0

Note[1]

Note [3]

MMDAT<3>/

MMCCS<1>

——

B18

B16

GPIO<112

ICOC

GPIO<112>

MMCMD

nMSINS

—

Pd-0

Note[1]

Note [3]

MMCMD

—

A13

A10

GPIO<113

ICOC

GPIO<113>

——

USB_P3_3

Pd-0

Note[1]

Note [3]

I2S_SYSCLK

AC97_RESET_n

—

D24

F19

GPIO<114

Note [17]

ICOC

GPIO<114>

Note [17]

CIFDD_<1>

——

Pd-0

Note[1]

Note [3]

UVS0

—

E21

GPIO<115

Note [17]

ICOC

GPIO<115>

Note [17]

DREQ<0>

CIF_DD<3>

MBREQ

Pu-1

Note[1]

Note [3]

UEN

nUVS1

PWM_OUT

<1>

C24

E20

GPIO<116

ICOC

GPIO<116>

CIF_DD<2>

AC97_SDATA_I

N_0

UDET

Pu-1

Note[1]

Note [3]

DVAL<0>

nUVS2

MBGNT

D20

C18

GPIO<117

ICOC

GPIO<117>

SCL

—

Pu-1

Note[1]

Note [3],

Note[12]

SCL

—

Table 4-1. Pin Usage Summary (Sheet 10 of 17)

VF-BGA

Ball#

(13x13)

PBGA

Ball#

(23x23)

Name

Type

Function

After

Reset

Primary

Function

Secondary

Alternate

Function

Third

Alternate

Function

Reset

State

Sleep

State

NOTE: Refer to Table 4-2 for Numbered Notes on Reset and Sleep States.

PXA270 Datasheet(PDF) 39 Page - Intel Corporation

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