PXA270 datasheet(65/126 Pages) INTEL

65 / 126 page

Electrical, Mechanical, and Thermal Specification

6-1

AC Timing Specifications

A pin’s alternating-current (AC) characteristics include input and output capacitance. These factors

determine the loading for external drivers and other load analyses. The AC characteristics also

include a derating factor, which indicates how much the AC timings might vary with different

loads.

Note: The timing diagrams in this chapter show bursts that start at 0 and proceed to 3 or 7. However, the

least significant address (0) is not always received first during a burst transfer, because the Intel®

PXA270 processor requests the critical word first during burst accesses.

Table 6-1 shows the AC operating conditions for the high- and low-strength input, output, and I/O

pins. All AC specification values are valid for the device’s entire temperature range.

6.1

AC Test Load Specifications

Figure 6-1 represents the timing reference load used in defining the relevant timing parameters of

the part. It is not intended to be either a precise representation of the typical system environment

nor a depiction of the actual load presented by a production tester. System designers use IBIS or

other simulation tools to correlate the timing reference load to system environment. Manufacturers

correlate to their production test conditions (generally a coaxial transmission line terminated at the

tester electronics).

Table 6-1. Standard Input, Output, and I/O-Pin AC Operating Conditions

Symbol

Description

Min

Typical

Max

Units

CIN

Input capacitance, all standard input and

I/O pins

—

COUT_H

Output capacitance, all standard high-

strength output and I/O pins

—

tdF_H

Output derating, falling edge on all

standard, high-strength output and I/O

pins, from 50-pf load.

—

TBD

—

ns/pf

tdR_H

Output derating, rising edge on all

standard, high-strength output and I/O

pins, from 50-pf load.

—

TBD

—

ns/pf

COUT_L

Output capacitance, all standard low-

strength output and I/O pins

—

tdF_L

Output derating, falling edge on all

standard, low-strength output and I/O

pins, from 50-pf load.

—

TBD

—

ns/pf

tdR_L

Output derating, rising edge on all

standard, low-strength output and I/O

pins, from 50-pf load.

—

TBD

—

ns/pf

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