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TDA8029HL/C2 Datasheet(PDF) 51 Page - NXP Semiconductors |
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TDA8029HL/C2 Datasheet(HTML) 51 Page - NXP Semiconductors |
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51 / 58 page  2003 Oct 30 51 Philips Semiconductors Product specification Low power single card reader TDA8029 ti(r), ti(f) input rise and fall times CL ≤ 60 pF −− 1 µs to(r), to(f) output rise and fall times CL ≤ 60 pF −− 0.1 µs Rpu internal pull-up resistance between I/O and VCC 11 14 17 k Ω tedge width of active pull-up pulse I/O configured as output, rising from LOW to HIGH 1/2fXTAL1 − 1/3fXTAL1 ns Iedge current from I/O when active pull-up VOH = 0.9 VCC; C = 60 pF −1 −− mA Timings tact activation sequence duration −− 130 µs tde deactivation sequence duration −− 100 µs Protections and limitations ICC(sd) shut-down and limitation current at VCC −−100 − mA II/O(lim) limitation current on I/O −15 − +15 mA ICLK(lim) limitation current on CLK −70 − +70 mA IRST(sd) shut-down current on RST −−20 − mA IRST(lim) limitation current on RST −20 − +20 mA Tsd shut-down temperature − 150 −°C Card presence input: pin PRES VIL LOW level input voltage −− 0.3VDD V VIH HIGH level input voltage 0.7VDD −− V ILI(L) input leakage current LOW VI =0 −20 − +20 µA ILI(H) input leakage current HIGH VI =VDD −20 − +20 µA Shut-down input: pin SDWN_N VIL LOW level input voltage −− 0.3VDD V VIH HIGH level input voltage 0.7VDD −− V ILI(L) input leakage current LOW VI =0 −20 − +20 µA ILI(H) input leakage current HIGH VI =VDD −20 − +20 µA General purpose I/O: pins P16, P17, P26, P27, INT1_N, RX and TX VIL LOW level input voltage −− 0.2VDD V VIH HIGH level input voltage 0.2VDD + 0.9 −− V VOL output voltage LOW IOL = 1.6 mA −− 0.4 V VOH output voltage HIGH IOH = −30 µAVDD − 0.7 −− V IIL input current LOW VI = 0.4 V −1 −−50 µA ITHL HIGH to LOW transition current VI =2V −− −650 µA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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