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DP83266 Datasheet(PDF) 88 Page - National Semiconductor (TI) |
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DP83266 Datasheet(HTML) 88 Page - National Semiconductor (TI) |
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88 / 152 page  70 Control Information (Continued) Frame Not Copied Counter (FNCT) The Frame Not Copied Counter (FNCT) maintains a count of the number of frames intended for this station that were not successfully copied by this station This count can be used to accumulate station performance statistics such as insufficient buffering or deficient frame processing capabilities for frames addressed to this station The Frame Not Copied Counter is incremented when an internal match occurs on the Destination Address no errors were detected in the frame and the frame was not successfully copied (internal VCOPY signal not asserted by the System Interface) Not Copied MAC frames and Void frames are not included in this count When OptionEMIND is set this count also includes frames not copied on external matches indicated by EA The handling of SMT NSA frames follows the MAC-2 Draft Standard For SMT NSA frames the Frame Not Copied Count only increments for NSA frames received with the A Indicator as an R symbol for which the frame was not copied SMT NSA frames received with the A Indicator as an S symbol do not cause this count to increment even if the frame is not successfully copied Interrupts are available on increment (CILRFRNCOP) and when the 20-bit counter overflows and wraps around (COLRFRN- COP) Access Rules Address Read Write 0B0–0B3h Always Stop Mode Register Bits D7 D6 D5 D4 D3 D2 D1 D0 FNCT0 Zero Zero Zero Zero Zero Zero Zero Zero FNCT1 Zero Zero Zero Zero CT19 CT18 CT17 CT16 FNCT2 CT15 CT14 CT13 CT12 CT11 CT10 CT9 CT8 FNCT3 CT7 CT6 CT5 CT4 CT3 CT2 CT1 CT0 Frame Transmitted Counter (FTCT) The Frame Transmitted Counter (FTCT) maintains the count of frames transmitted successfully by this station The counter can be used to accumulate station performance statistics The Frame Transmitted Counter is incremented every time a complete frame is transmitted from the MAC Request Interface MAC and Void frames generated by the Ring Engine are not included in the count Interrupts are available on increment (CILRFRTRX) and when the 20-bit counter overflows and wraps around (COLRFRTRX) Access Rules Address Read Write 0B4–0B7h Always Stop Mode Register Bits D7 D6 D5 D4 D3 D2 D1 D0 FTCT0 Zero Zero Zero Zero Zero Zero Zero Zero FTCT1 Zero Zero Zero Zero CT19 CT18 CT17 CT16 FTCT2 CT15 CT14 CT13 CT12 CT11 CT10 CT9 CT8 FTCT3 CT7 CT6 CT5 CT4 CT3 CT2 CT1 CT0 88 |
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