DAC7760IPWPR datasheet(28/63 Pages) TI1

28 / 63 page

CODE

VREF

VOUT

VREF • GAIN •

GAIN •

CODE

VOUT

VREF • GAIN •

DAC7760, DAC8760

SBAS528B – JUNE 2013 – REVISED JUNE 2016

www.ti.com

Product Folder Links: DAC7760 DAC8760

Submit Documentation Feedback

Feature Description (continued)

VOUT and +VSENSE to prevent this from occurring. The –VSENSE pin, on the other hand, is provided as a

GND sense reference output from the internal VOUT amplifier. The output swing of the VOUT amplifier is relative

to the voltage seen at this pin. The actual voltage difference between the –VSENSE pin and the device GND

pins is not expected to be more than a few 100 µV. The internal resistor shown in Figure 83 between the device

internal GND and the –VSENSE pin is typically 2 kΩ.

After power on, the power-on-reset circuit makes sure that all registers are at their default values. Therefore, the

voltage output buffer is in a Hi-Z state; however, the +VSENSE pin connects to the amplifier inputs through an

internal 60-kΩ feedback resistor (RFB in Figure 83). If the VOUT and +VSENSE pins are connected together, the

VOUT pin is also connected to the same node through the feedback resistor. This node is protected by internal

circuitry and settles to a value between GND and the reference input.

The output voltage (VOUT) can be expressed as Equation 1 and Equation 2.

For unipolar output mode:

(1)

For bipolar output mode:

where

•

CODE is the decimal equivalent of the code loaded to the DAC

•

N is the bits of resolution; 16 for DAC8760 and 12 for DAC7760

•

VREF is the reference voltage; for internal reference, VREF = 5 V

•

GAIN is automatically selected for a desired voltage output range as shown in Table 1

(2)

(1)

VREF = 5 V

Table 1. Voltage Output Range vs Gain Setting(1)

VOLTAGE OUTPUT

GAIN

0 V to 5 V

0 V to 10 V

±5 V

±10 V

The voltage range is set according to the value of the RANGE bits and the OVR bit in the Control Register. The

OVR bit makes the gain value in Table 1 increase by 10%, thereby increasing the voltage output range, as

shown in Table 8 (see Setting Voltage and Current Output Ranges for more details).

8.3.3 Current Output Stage

The current output stage consists of a preconditioner and a current source as conceptualized in Figure 84. This

stage provides a current output according to the DAC code. The output range can be programmed as 0 mA to

20 mA, 0 mA to 24 mA, or 4 mA to 20 mA. An external boost transistor can be used to reduce the power

dissipation of the device. The maximum compliance voltage on pin IOUT equals (AVDD – 2 V). In single power-

supply mode, the maximum AVDD is 36 V, and the maximum compliance voltage is 34 V. After power on, the

IOUT pin is in a Hi-Z state.

DAC7760IPWPR Datasheet(PDF) 28 Page - Texas Instruments

DAC7760IPWPR Datasheet(HTML) 28 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

Datasheet Download

Link URL