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DAC7760IPWPR Datasheet(PDF) 12 Page - Texas Instruments |
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DAC7760IPWPR Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 63 page ![]() SCLK LATCH DIN SDO 1 2 24 25 26 48 DB23 DB23 DB23 DB23 DB0 DB0 DB0 DB0 t 22 t 27 t 20 t 26 t 29 t 23 t 21 t 24 t 25 t 28 Input word for DAC-N 1 - Input word for DAC-N Input word for DAC-N Undefined SCLK LATCH DIN SDO 1 1 8 2 2 9 24 24 23 22 DB23 DB23 DB0 DB0 DB0 DB16 t 12 t 17 t 16 t 13 t 14 t 15 t 18 t 20 t 19 t 11 Input word specifies register to be read Undefined data NOP condition X X X X First eight bits are bits don’t care Selected register data clocked out SCLK LATCH DIN CLR I /V OUT OUT 1 2 24 DB23 DB0 t 2 t 7 t 6 t 3 t 4 t 5 t 8 t 10 t 9 t 1 12 DAC7760, DAC8760 SBAS528B – JUNE 2013 – REVISED JUNE 2016 www.ti.com Product Folder Links: DAC7760 DAC8760 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Figure 1. Write Mode Timing Figure 2. Readback Mode Timing Figure 3. Daisy-Chain Mode Timing |
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