DAC7760IPWPR datasheet(34/63 Pages) TI1

34 / 63 page

Time (150 µs/ div)

no cap

3 nF CAP1

3 nF CAP2

10 nF CAP1

10 nF CAP2

C001

0 mA to 20 mA range

SRCLK=1100h

SRSTEP = 111h

Slew Time =

Output Change

Step Size Update Clock Frequency LSB Size

DAC7760, DAC8760

SBAS528B – JUNE 2013 – REVISED JUNE 2016

www.ti.com

Product Folder Links: DAC7760 DAC8760

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Table 6. Slew Rate Update Clock (SRCLK) Options

SRCLK

DAC UPDATE FREQUENCY (Hz)

0000

258,065

0001

200,000

0010

153,845

0011

131,145

0100

115,940

0101

69,565

0110

37,560

0111

25,805

1000

20,150

1001

16,030

1010

10,295

1011

8,280

1100

6,900

1101

5,530

1110

4,240

1111

3,300

The time required for the output to slew over a given range can be expressed as Equation 7:

where

•

Slew Time is expressed in seconds

•

Output Change is expressed in amps (A) for IOUT or volts (V) for VOUT

(7)

When the slew rate control feature is enabled, all output changes happen at the programmed slew rate. This

configuration results in a staircase formation at the output. If the CLR pin is asserted, the output slews to the

zero-scale value at the programmed slew rate. Bit 1 (SR-ON) of the Status Register can be read to verify that the

slew operation has completed. The update clock frequency for any given value is the same for all output ranges.

The step size, however, varies across output ranges for a given value of step size because the LSB size is

different for each output range. Figure 86 shows an example of IOUT slewing at a rate set by the above

described parameters. In this example for the DAC8760 (LSB size of 305 nA for the 0-mA to 20-mA range), the

settings correspond to an update clock frequency of 6.9 kHz and a step size of 128 LSB. As can be seen for the

case with no capacitors on CAP1 or CAP2, the steps occur at the update clock frequency (6.9 kHz corresponds

to a period close to 150 µs) and the size of each step is about 38 µA (128 × 305 nA). The slew time for a specific

code change can be calculated using Equation 7.

Figure 86. IOUT vs Time With Digital Slew Rate Control

DAC7760IPWPR Datasheet(PDF) 34 Page - Texas Instruments

DAC7760IPWPR Datasheet(HTML) 34 Page - Texas Instruments

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