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WM5102 Datasheet(PDF) 22 Page - Wolfson Microelectronics plc |
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WM5102 Datasheet(HTML) 22 Page - Wolfson Microelectronics plc |
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22 / 334 page  WM5102 Production Data w PD, June 2014, Rev 4.2 22 Test Conditions The following electrical characteristics are valid across the full range of recommended operating conditions. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Digital Input / Output (except DMICDATn and DMICCLKn) Digital I/O is referenced to DBVDD1, DBVDD2 or DBVDD3. See “Pin Description” for the domain applicable to each pin. See “Recommended Operating Conditions” for the valid operating voltage range of each DBVDDn domain. Input HIGH Level VIH VDBVDDn =1.8V ±10% 0.65 VDBVDDn V VDBVDDn =3.3V ±10% 0.7 VDBVDDn Input LOW Level VIL VDBVDDn =1.8V ±10% 0.35 VDBVDDn V VDBVDDn =3.3V ±10% 0.3 VDBVDDn Note that digital input pins should not be left unconnected or floating. Output HIGH Level VOH IOH = 1mA 0.9 VDBVDDn V Output LOW Level VOL IOL = -1mA 0.1 VDBVDDn V Input capacitance 10 pF Input leakage -1 1 µA Pull-up resistance (where applicable) 42 49 56 kΩ Pull-down resistance (where applicable) 80 105 130 kΩ Digital Microphone Input / Output (DMICDATn and DMICCLKn) DMICDATn and DMICCLKn are each referenced to a selectable supply, VSUP, according to the INn_DMIC_SUP registers DMICDATn input HIGH Level VIH 0.65 VSUP V DMICDATn input LOW Level VIL 0.35 VSUP V DMICCLKn output HIGH Level VOH IOH = 1mA 0.8 VSUP V DMICCLKn output LOW Level VOL IOL = -1mA 0.2 VSUP V Input capacitance 10 pF Input leakage -1 1 µA SLIMbus Digital Input / Output (SLIMCLK and SLIMDAT) 1.8V I/O Signalling (ie. 1.65V ≤ DBVDD1 ≤1.95V) Input HIGH Level VIH 0.65 VDBVDD1 V Input LOW Level VIL 0.35 VDBVDD1 V Output HIGH Level VOH IOH = 1mA 0.9 VDBVDD1 V Output LOW Level VOL IOL = -1mA 0.1 VDBVDD1 V Pin capacitance 5 pF General Purpose Input / Output (GPIOn) Clock output frequency GPIO pin configured as OPCLK or FLL output 26.5 MHz |
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