TMS320C54CST datasheet(28/171 Pages) TI

28 / 171 page

Functional Overview

November 2001 − Revised September 2003

SPRS187B

The telephony algorithms included in the ROM are the following:

•

Modem Algorithms

−

V.32bis/V.22bis (up to 14.4 kbps)

−

V.42 error correction

Embedded V.42bis compression

−

Modem Integrator

Embedded V.14 async-to-sync conversion

•

Telephony Algorithms

−

UMTG/UMTD (Universal multifrequency tone generator/detector)

DTMF generation/detection

Call Progress Tone generation/detection

−

Caller ID types 1 and 2

•

Voice Algorithms

−

G.168 line echo cancellation

−

G.726 ACPCM compression (16−40 kbps)

Embedded G.711 PCM

−

Automatic Gain Control (AGC)

−

Voice Activity Detection (VAD)

−

Comfort Noise Generation (CNG)

3.3

On-Chip RAM

The 54CST device contains 40K-words x 16-bit of DARAM.

The DARAM is composed of five blocks of 8K words each. Each block in the DARAM can support two reads

in one cycle, or a read and a write in one cycle. The five blocks of DARAM on the 54CST are located in the

address range 0080h−9FFFh in data space and can be mapped in program/data space by setting the OVLY

bit to one.

3.4

On-Chip Memory Security

The 54CST device provides maskable options to protect the contents of on-chip memories. When the ROM

protect option is selected, no externally originating instruction can access the on-chip ROM; when the RAM

protect option is selected, HPI RAM is protected; HPI writes are not restricted, but HPI reads are restricted

to 2000h − 3FFFh.

TMS320C54CST Datasheet(PDF) 28 Page - Texas Instruments

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