TMS320C54CST datasheet(30/171 Pages) TI

30 / 171 page

Functional Overview

November 2001 − Revised September 2003

SPRS187B

Page 0

64K

See

Figure 3−2

0 0000

0 FFFF

Page 1

Lower

32K†

External

1 0000

1 FFFF

Page 1

On-chip

ROM

(32K

words)

1 7FFF

1 8000

Page 2

Lower

32K†

External

2 0000

2 FFFF

Page 2

On-chip

ROM

(32K

words)

2 7FFF

2 8000

Page 3

Lower

32K†

External

3 0000

3 DFFF

3 7FFF

3 8000

Page 4

Lower

32K†

External

4 0000

4 FFFF

Page 4

Upper 32K

External

4 7FFF

4 8000

Page 5

Lower

32K†

External

5 0000

5 FFFF

Page 5

Upper 32K

External

5 7FFF

5 8000

Page 127

Lower

32K†

External

7F 0000

7F FFFF

Page 127

Upper 32K

External

7F 7FFF

7F 8000

. . . . . .

3 FFFF

3 E000

External

Page 3

On-chip

ROM

(24K

words)

† The lower 32 K words of pages 1 through 127 are only available when the OVLY bit is cleared to 0. If the OVLY bit is set to 1, the on-chip memory

is mapped to the lower 32 K words of all program space pages.

Figure 3−3. Extended Program Memory Map

3.5.1 Relocatable Interrupt Vector Table

The reset, interrupt, and trap vectors are addressed in program space. These vectors are soft — meaning that

the processor, when taking the trap, loads the program counter (PC) with the trap address and executes the

code at the vector location. Four words, either two 1-word instructions or one 2-word instruction, are reserved

at each vector location to accommodate a delayed branch instruction which allows branching to the

appropriate interrupt service routine without the overhead.

At device reset, the reset, interrupt, and trap vectors are mapped to address FF80h in program space.

However, these vectors can be remapped to the beginning of any 128-word page in program space after

device reset. This is done by loading the interrupt vector pointer (IPTR) bits in the PMST register with the

appropriate 128-word page boundary address. After loading IPTR, any user interrupt or trap vector is mapped

to the new 128-word page.

NOTE: The hardware reset (RS) vector cannot be remapped because the hardware reset loads the IPTR

with 1s. Therefore, the reset vector is always fetched at location FF80h in program space.

TMS320C54CST Datasheet(PDF) 30 Page - Texas Instruments

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