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LAN9115 Datasheet(PDF) 83 Page - Microchip Technology

Part # LAN9115
Description  Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
PDF  114 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9115 Datasheet(HTML) 83 Page - Microchip Technology

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 2005-2016 Microchip Technology Inc.
DS00002269A-page 83
LAN9115
Table 5-7 below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the
Ethernet physical address. Also shown is the correlation between the EEPROM addresses and ADDRL and ADDRH
registers.
As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and ADDRH registers would
be programmed as shown in Figure 5-2. The values required to automatically load this configuration from the EEPROM
are also shown.
5.4.4
HASHH—MULTICAST HASH TABLE HIGH REGISTER
The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the destination address
in the incoming frame is used to index the contents of the Hash table. The most significant bit determines the register
to be used (Hi/Low), while the other five bits determine the bit within the register. A value of 00000 selects Bit 0 of the
Multicast Hash Table Lo register and a value of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.
If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All Multicast” (MCPAS)
bit is set (1), then all multicast frames are accepted regardless of the multicast hash values.
The Multicast Hash Table Hi register contains the higher 32 bits of the hash table and the Multicast Hash Table Low
register contains the lower 32 bits of the hash table.
TABLE 5-7:
ADDRL, ADDRH AND EEPROM BYTE ORDERING
EEPROM ADDRESS
ADDRN
ORDER OF RECEPTION ON ETHERNET
0x01
ADDRL[7:0]
1st
0x02
ADDRL[15:8]
2nd
0x03
ADDRL[23:16]
3rd
0x04
ADDRL[31:24]
4th
0x05
ADDRH[7:0]
5th
0x06
ADDRH[15:8]
6th
FIGURE 5-2:
EXAMPLE ADDRL, ADDRH AND EEPROM SETUP
Note:
By convention, the left most byte of the Ethernet address (in this example 0x12) is the most significant byte
and is transmitted/received first.
Offset:
4
Attribute:
R/W
Default Value:
00000000h
Size:
32 bits
Bits
Description
31-0
Upper 32 bits of the 64-bit Hash Table
0x12
0
7
0x34
8
15
0x56
16
23
0x78
24
31
ADDRL
0x9A
0
7
0xBC
8
15
ADDRH
xx
16
23
xx
24
31
0xA5
0x12
0x34
0x56
0x78
0x9A
0xBC
0x00
0x01
0x02
0x03
0x04
0x05
0x06
EEPROM



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