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LAN9115 Datasheet(PDF) 14 Page - Microchip Technology |
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LAN9115 Datasheet(HTML) 14 Page - Microchip Technology |
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14 / 114 page ![]() LAN9115 DS00002269A-page 14 2005-2016 Microchip Technology Inc. Note 2-2 The external SMI port is selected when SMI_SEL = 1. When SMI_SEL = 0, MDIO is tri-stated and MDC is driven low. 30 Management Data IO/External PHY Detect MDIO (EXT_PHY_DET) I/O8 (PD) 1 Management Data IO: When SMI_SEL = 1, this pin is the MII SMI serial IO bus pin. External PHY Detect: This pin also functions as a strap input, which can be used to indicate the presence of an external PHY. See Note 2-2. Note: See Section 5.3.9, "HW_CFG—Hardware Configuration Register" for more information on SMI_- SEL and EXT_PHY_DET 31 Management Data Clock MDC O8 (PD) 1 Management Data Clock: When SMI_SEL = 1, this pin is the MII management data clock. When SMI_SEL=0, this pin is driven low. See Note 2-2. Note: See Section 5.3.9, "HW_CFG—Hardware Configuration Register" for more information on SMI_- SEL. TABLE 2-6: MII INTERFACE SIGNALS (CONTINUED) Pin No. Name Symbol Buffer Type # Pins Description |
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