TNETV1644ZDU6 datasheet(33/306 Pages) TI1

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TMS320DM6437

Digital Media Processor

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SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

Table 2-10. EMIFA Terminal Functions (EMIFA Pinout Mode 1, AEM[2:0] = 001) (continued)

SIGNAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

ZWT

ZDU

NAME

NO.

This pin is multiplexed between VPBE (VENC), EMIFA (NAND), and

GPIO.

For EMIFA (NAND), this pin is Chip Select 2 output EM_CS2 for use

with NAND flash.

G0/EM_CS2/

IPD

C19

C22

I/O/Z

This is the chip select for the default boot and ROM boot modes.

GP[12]

DVDD33

Note: This pin features an internal pulldown (IPD). If this pin is

connected and used as an EMIFA chip select signal, for proper device

operation, an external pullup resistor must be used to ensure the

EM_CSx function defaults to an inactive (high) state.

This pin is multiplexed between VPBE (VENC), EMIFA (NAND), and

GPIO.

For EMIFA (NAND), this pin is Chip Select 3 output EM_CS3 for use

LCD_OE/EM_CS3/

IPD

with NAND flash.

C18

D22

I/O/Z

GP[13]

DVDD33

Note: This pin features an internal pulldown (IPD). If this pin is

connected and used as an EMIFA chip select signal, for proper device

operation, an external pullup resistor must be used to ensure the

EM_CSx function defaults to an inactive (high) state.

This pin is multiplexed between VPBE (VENC), EMIFA (NAND), and

GPIO.

For EMIFA (NAND), it is Chip Select 4 output EM_CS4 for use with

VSYNC/EM_CS4/

IPD

NAND flash.

E19

H22

I/O/Z

GP[32]

DVDD33

Note: This pin features an internal pulldown (IPD). If this pin is

connected and used as an EMIFA chip select signal, for proper device

operation, an external pullup resistor must be used to ensure the

EM_CSx function defaults to an inactive (high) state.

This pin is multiplexed between VPBE (VENC), EMIFA (NAND), and

GPIO.

For EMIFA (NAND), it is Chip Select 5 output EM_CS5 for use with

HSYNC/EM_CS5/

IPD

NAND flash.

F19

J22

I/O/Z

GP[33]

DVDD33

Note: This pin features an internal pulldown (IPD). If this pin is

connected and used as an EMIFA chip select signal, for proper device

operation, an external pullup resistor must be used to ensure the

EM_CSx function defaults to an inactive (high) state.

COUT0/EM_D0/

IPD

D16

E21

I/O/Z

GP[14]

DVDD33

COUT1/EM_D1/

IPD

D18

G20

I/O/Z

GP[15]

DVDD33

COUT2/EM_D2/

IPD

D17

E22

I/O/Z

GP[16]

DVDD33

These pins are multiplexed between VPBE (VENC), EMIFA (NAND),

COUT3/EM_D3/

IPD

E16

F20

I/O/Z

and GPIO.

GP[17]

DVDD33

COUT4/EM_D4/

IPD

For EMIFA (NAND) AEM[2:0] = 001, these are the 8-bit bi-directional

E18

G21

I/O/Z

GP[18]

DVDD33

data bus (EM_D[7:0]).

COUT5/EM_D5/

IPD

E17

F22

I/O/Z

GP[19]

DVDD33

COUT6/EM_D6/

IPD

F16

F21

I/O/Z

GP[20]

DVDD33

COUT7/EM_D7/

IPD

F17

H20

I/O/Z

GP[21]

DVDD33

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